EasyManua.ls Logo

Xilinx Spartan-6 - Page 18

Xilinx Spartan-6
40 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
18 www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx)
UG396 (v1.0) June 10, 2010
Appendix A: Frequently Asked Questions
2. What is the J0 symbol on the schematic screen (Figure A-2)?
The J0 symbol appears unconnected on the schematics screen and must not be
removed from the schematics. The J0 symbol inserts global simulation parameters,
such as .TEMP and .option compat (the HSPICE compatibility switch for Eldo) into
the project. These parameters are managed automatically by the configurator
programs. Removing J0 results in incorrect simulations.
X-Ref Target - Figure A-2
Figure A-2: J0 Symbol
UG396_c1_01_042010

Related product manuals