Xilinx Virtex-7 FPGA VC7203 User Manual

30 www.xilinx.com VC7203 IBERT Getting Started Guide
UG847 (v3.0) July 10, 2013
Chapter 1: VC7203 IBERT Getting Started Guide
7. A Customize IP window opens. In the Protocol Definition tab, change
LineRate (Gbps) to 12.5, then change Refclk (MHz) to 156.25. Do not change the
other defaults (Figure 1-24).
X-Ref Target - Figure 1-23
Figure 1-23: IP Catalog
8*BFBB

Xilinx Virtex-7 FPGA VC7203 Specifications

General

FPGA Family	Virtex-7
Device	XC7VX485T
Transceivers	16
Maximum Transceiver Speed	12.5 Gbps
Transceiver Type	GTX
DSP Slices	2, 800
Block RAM	37, 080 KB
Clock Management Tiles	12
PCIe Gen2/Gen3 Support	Yes
Package	FFG1761