Xilinx Virtex-7 FPGA VC7203 - Page 36

36 www.xilinx.com VC7203 IBERT Getting Started Guide
UG847 (v3.0) July 10, 2013
Chapter 1: VC7203 IBERT Getting Started Guide
13. In the Sources window, Design Sources should now reflect that the SuperClock-2
module is part of the example IBERT design. Right-click the IBERT core .xci file in
X-Ref Target - Figure 1-29
Figure 1-29: SuperClock-2 in the Example IBERT Wrapper
8*BFBB