Xilinx Virtex-7 FPGA VC7203 - Page 41

VC7203 IBERT Getting Started Guide www.xilinx.com 41
UG847 (v3.0) July 10, 2013
Creating the GTX IBERT Core
19. When implementation completes, navigate to the project directory and locate the
resultant bitstream here:
\ibert_7series_gtx_0\example_project\ibert_7series_gtx_0_exampl
e\ibert_7series_gtx_0_example.runs\impl_1\.
X-Ref Target - Figure 1-34
Figure 1-34: Generate Bitstream
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