Xilinx Zynq UltraScale+ User Manual

Zynq UltraScale+ VCU TRD User Guide 6
UG1250 (v2019.1) May 29, 2019 www.xilinx.com
Chapter 1: Introduction
This user guide describes the architecture of the reference design and provides a functional
description of its components. It is organized as follows:
• Chapter 1, Introduction (this chapter) provides a high-level overview of the Zynq
UltraScale+ MPSoC architecture, the reference design architecture, and a summary of
key features.
• Chapter 2, Targeted Reference Design Details gives an overview of the design modules
and design components that make up this reference design.
• Chapter 3, APU Software Platform describes the APU software platform covering the
middleware and operating system layers of the Linux software stack and the Linux
GStreamer application running on the APU.
• Chapter 4, System Considerations describes system architecture considerations
including boot flow, system address map, video buffer formats, and performance
analysis.
• Chapter 5, Hardware Platform describes the hardware platform of the design including
key PS and PL peripherals.
• Appendix A, Input Configuration File lists additional resources and references.
Send Feedback

Xilinx Zynq UltraScale+ Specifications

General

Manufacturer	Xilinx
Model	Zynq UltraScale+
Category	SoC
Processor Cores	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
FPGA Fabric	UltraScale+ FPGA
Memory Interfaces	DDR4, DDR3, LPDDR3, LPDDR4
Connectivity	Gigabit Ethernet, USB 3.0, SATA, PCIe
Video Codecs	H.264
Power Consumption	Varies depending on specific device configuration and usage
Operating Temperature	Commercial: 0°C to +85°C, Industrial: -40°C to +100°C