Xilinx Zynq UltraScale+ User Manual

Zynq UltraScale+ VCU TRD User Guide 54
UG1250 (v2019.1) May 29, 2019 www.xilinx.com
Chapter 5
Hardware Platform
Introduction
This chapter describes the targeted reference design (TRD) hardware architecture.
Figure 5-1 shows a block diagram of the design components inside the PS and PL on the
ZCU106 base board and the LI-IMX274MIPI-FMC image sensor daughter card.
X-Ref Target - Figure 5-1
Figure 5-1: Hardware Block Diagram
ZCU106
Ethernet
Source/Sink
IMX274
Sensor
LI-IMX274MIPI-FMC
Accerlator
VCU
SDX Bypass Filter
Accelerator
DP TX
DDR Controller
DP
Sink
UVC
Source
Programmable
Logic
Processing
System
Encoder
Decoder
GPU
USB
MIPI CSI
Ethernet 10G
PCIe Host
PCI+XDMA
HDMI Sink
HDMI + Audio
SDI Sink
SDI TX
I2S Sink
I2S + Audio TX
VCU DDR
HDMI + Audio
Source
HDMI + Audio
SDI Source
SDI RX
I2S Source I2S + Audio RX
TPG
Base Platform
X19300-051319
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Xilinx Zynq UltraScale+ Specifications

General

Manufacturer	Xilinx
Model	Zynq UltraScale+
Category	SoC
Processor Cores	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
FPGA Fabric	UltraScale+ FPGA
Memory Interfaces	DDR4, DDR3, LPDDR3, LPDDR4
Connectivity	Gigabit Ethernet, USB 3.0, SATA, PCIe
Video Codecs	H.264
Power Consumption	Varies depending on specific device configuration and usage
Operating Temperature	Commercial: 0°C to +85°C, Industrial: -40°C to +100°C