Appendix 2 instructions list
LSL
1※
Logic shift left √ √ √ √
LSR
1※
Logic shift right √ √ √ √
ROL
1※
Rotation shift lift √ √ √ √
ROR
1※
Rotation shift right √ √ √ √
SFTL
1※
Bit shift left √ √ √ √
SFTR
1※
Bit shift right √ √ √ √
WSFL Word shift left √ √ √ √
WSFR Word shift right √ √ √ √
WTD Single word integer convert to double
word integer
√ √ √ √
FLT
1※
16 bits integer convert to float √ √ √ √
FLTD
1※
64 bits integer convert to float √ √ √ √
INT
1※
Float convert to integer √ √ √ √
BIN BCD convert to binary √ √ √ √
BCD Binary convert to BCD √ √ √ √
ASCI Hex convert to ASCⅡ √ √ √ √
HEX ASCⅡ convert to Hex √ √ √ √
DECO Coding √ √ √ √
ENCO High bit coding √ √ √ √
Data
convert
ENCOL Low bit coding √ √ √ √
Suit Model
Sort Mnemonic
function
XC1
XC2
XC3
XC5
XCM
ECMP
2※
Float compare √ √ √ √
EZCP
2※
Float zone compare √ √ √ √
EADD
2※
Float addition √ √ √ √
ESUB
2※
Float subtraction √ √ √ √
EMUL
2※
Float multiplication √ √ √ √
EDIV
2※
Float division √ √ √ √
ESQR
2※
Float square root √ √ √ √
SIN
2※
Sine √ √ √ √
COS
2※
Cosine √ √ √ √
TAN
2※
tangent √ √ √ √
ASIN
2※
Float arcsin √ √ √ √
ACOS
2※
Float arccos √ √ √ √
Float
Operation
ATAN
2※
Float arctan √ √ √ √
TRD Read RTC data √ √ √ √
Clock
TWR Set RTC data √ √ √ √
1※ :All the instructions are 16bits except the instructions with 1※ which has 32bits. 32bits instructions are added
D in front of its 16bits instruction. Such as ADD(16bits) / DADD(32bits).
※2: These instructions are 32bits, and have no 16bits format.
※3: √ means this series support the instruction.