Yamaha CDX-E410 - Page 13

CDX-E410
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1
2
3
4
5
6
11
12
20
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14
15
18
19
16
17
RST
VL
SDATA
SCLK
LRCK
MCLK
FILT+
CMOUT
AMUTEC
BMUTEC
AOUTB-
AOUTB+
AOUTA+
AOUTA
AGND
VA
No. Symbol Function
Reset (Input) - Powers down device and resets all intemal registers to their default settings.
Logic Power (Input) - Positive power for the digital input/output.
Serial Audio Data (Input) - Input for two’s complement serical audio data.
Serial Clock (input/output) - Serial clock for the serial audio interface.
Left Right Clock (Input/output) - Determines which channel, Left or Right, is currently active on the serial audio
data line.
Master Clock (Input) -Clock source for the delta-sigma moudukafor and digital filters.
Positive Voltage Reference (Output) - Positive reference voltage for the intemal sampling circuits.
Common Mode Voltage (Output) - Filter connection for internal quiescent voltage.
Mute Control (output) - The Mute Confrol pin goes high during power-up initialization, reset, muting, power-down
or if the master clock to left/right clock frequency ratio is incorrect.
Differential Analog Output (Outputs) - The full scale differential analog output level is specified in the Analog
Characteristics specification table.
Ground (Input)
Analog Power (Input) - Positive power for the analog section.
7
8
9
10
M3
SCL/CCLK
SDA/CDIN
AD0/CS
No. Symbol Function
Mode Selection (Input) -This pins should be tied to GND level during control port mode.
Serial Control Port Clock (input) - Serial clock for the serial control port.
Serial Control Data (input/output) - SDA is a data l/O line in l
2
C mode.CDIN is the input data line for the control
port interface in SPI mode.
Address Bit 0 (I
2
C) / Control Port Chip Select (SPI) (Input/Output) - AD0 is a chip address pin in I
2
C mode,
CS
is
the chip select signal for SPI format.
Control Port mode Definitions
7
8
9
10
M3
M2
M1
M0
No. Symbol Function
Mode Selection (Input) - Determines the operational mode of the device.
Stand-Alone Mode Definitions