eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
104
AND A, r
Logical AND
Operation
A ← A AND r
Description
The
r
operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. The
r
operand is
bitwise ANDed with the contents of the accumulator, A. The result is stored in the accu-
mulator.
Condition Bits Affected
Attributes
jj identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes in
Table 43.
S Set if result is negative; reset otherwise.
Z Set if result is 0; reset otherwise.
H Set.
P/V Set if parity is even; reset otherwise.
N Reset.
C Reset.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
AND A,r X1jj
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