ZiLOG eZ80 User Manual

eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
141
DJNZ d
Decrement B Jump not 0
Operation
B ← B – 1
if B ≠ 0 {
PC ← PC+d
}
Description
The B register decrements by 1. If the resultant value in register B is not 0, the two’s-com-
plement displacement
d is added to the value of the Program Counter. The jump is mea-
sured from the address of the instruction opcode following this instruction.
Condition Bits Affected
None.
Attributes
Mnemonic Operand ADL Mode Cycle Opcode (hex)
DJNZ d X2/410, dd

ZiLOG eZ80 Specifications

General

Brand	ZiLOG
Model	eZ80
Category	Computer Hardware
Language	English