ZiLOG eZ80

eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
221
LD r, (HL)
Load Register
Operation
r ← (HL)
Description
The r operand is any of A, B, C, D, E, H, or L. The (HL) operand is an 8-bit value at the
memory location specified by the contents of the multibyte CPU register HL. This 8-bit
value is written to the specified
r register.
Condition Bits Affected
None.
Attributes
jj identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
indicated in Table 67.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LD r,(HL) X 2 jj
LD.S r,(HL) 1 3 52, jj
LD.L r,(HL) 0 3 49, jj
Table 67. Register and jj Opcodes for LD r, (HL) Instruction (hex)
Register jj Register jj
A 7E E 5E
B 46 H 66
C 4E L 6E
D 56