ZiLOG eZ80 User Manual

eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
286
PUSH rr
Push Stack
Operation
if ADL mode {
(SPL – 1) ← rr[23:16]
(SPL – 2) ← rr[15:8]
(SPL – 3) ← rr[7:0]
SPL ← SPL – 3
}
else Z80 mode {
(SPS – 1) ← rr[15:8]
(SPS – 2) ← rr[7:0]
SPS ← SPS – 2
}
Description
The rr operand is any of the multibyte CPU registers BC, DE, or HL. In ADL mode, or
when the
.L suffix is employed, 3 bytes are pushed onto the memory locations indicated by
SPL
, in the following sequence:
1. The CPU writes the contents of the upper byte of the specified register,
rr [23:16], to
the memory location with address SPL
– 1.
2. The CPU next writes the contents of the High byte of the specified register,
rr [15:8],
to the memory location with address SPL
– 2.
3. The CPU next writes the contents of the Low byte of the specified register,
rr [7:0], to
the memory location with address SPL
– 3.
SPL decrements by three.
In Z80 mode, or when the
.S suffix is employed, 2 bytes are pushed onto the memory loca-
tions indicated by SPS, in the following sequence:
1. The CPU writes the contents of the High byte of the specified register,
rr [15:8], to the
memory location with address SPS
– 1.
2. The CPU next writes the contents of the Low byte of the specified register,
rr [7:0], to
the memory location with address SPS
– 2.
SPS decrements by two.
Condition Bits Affected
None.

ZiLOG eZ80 Specifications

General

Brand	ZiLOG
Model	eZ80
Category	Computer Hardware
Language	English