ZiLOG eZ80 User Manual

UM007714-0908 Opcode Maps
eZ80
®
CPU
User Manual
378
Table 109. Opcode Map—Second Opcode After 0EDh
Lower Nibble (Hex)
0123456789ABCDEF
Upper Nibble (Hex)
0
IN0
B,(n)
OUT0
(n),B
LEA BC
,IX+d
LEA BC
,IY+d
TST
A,B
LD BC,
(HL)
IN0
C,(n)
OUT0
(n),C
TST
A,C
LD (HL),
BC
1
IN0
D,(n)
OUT0
(n),D
LEA DE
,IX+d
LEA DE
,IY+d
TST
A,D
LD DE,
(HL)
IN0
E,(n)
OUT0
(n),E
TST
A,E
LD(HL),
DE
2
IN0
H,(n)
OUT0
(n),H
LEA HL
,IX+d
LEA HL
,IY+d
TST
A,H
LD HL,
(HL)
IN0
L,(n)
OUT0
(n),L
TST
A,L
LD (HL),
HL
3
LD IY,
(HL)
LEA IX
,IX+d
LEA IY
,IY+d
TST
A,(HL)
LD IX,
(HL)
IN0
A,(n)
OUT0
(n),A
TST
A,A
LD
(HL),IY
LD (HL),
IX
4
IN
B,(BC)
OUT
(BC),B
SBC
HL,BC
LD
(Mmn),
BC
NEG RETN IM 0
LD
I,A
IN
C,(BC)
OUT
(BC),C
ADC
HL,BC
LD
BC,
(Mmn)
MLT
BC
RETI
LD
R,A
5
IN
D,(BC)
OUT
(BC),D
SBC
HL,DE
LD
(Mmn),
DE
LEA IX
,IY+d
LEA IY
,IX+d
IM 1
LD
A,I
IN
E,(BC)
OUT
(BC),E
ADC
HL,DE
LD
DE,
(Mmn)
MLT
DE
IM 2
LD
A,R
6
IN
H,(BC)
OUT
(BC),H
SBC
HL,HL
LD
(Mmn),
HL
TST
A,n
PEA
IX+d
PEA
IY+d
RRD
IN
L,(BC)
OUT
(BC),L
ADC
HL,HL
LD
HL,
(Mmn)
MLT
HL
LD
MB,A
LD
A,MB
RLD
7
SBC
HL,SP
LD
(Mmn),
SP
TSTIO
n
SLP
IN
A,(BC)
OUT
(BC),A
ADC
HL,SP
LD
SP,
(Mmn)
MLT
SP
STMIX RSMIX
8 INIM OTIM INI2 INDM OTDM IND2
9 INIMR OTIMR INI2R INDMR OTDMR IND2R
A LDI CPI INI OUTI OUTI2 LDD CPD IND OUTD OUTD2
BLDIR CPIR INIR OTIR
OTI2R
LDDR CPDR INDR OTDR OTD2R
C INIRX OTIRX
LD
I,HL
INDRX OTDRX
D
LD
HL,I
E
F
Note: n = 8-bit data; Mmn = 16- or 24-bit addr or data; d = 8-bit two’s-complement displacement.
SBC
2
4
Mnemonic
Second Operand
First Operand
HL,BC
Lower Nibble of 2nd Opcode
Upper
Opcode
of Second
Nibble
Legend

ZiLOG eZ80 Specifications

General

Brand	ZiLOG
Model	eZ80
Category	Computer Hardware
Language	English