SubCompact Board GENE-6350
Appendix A Programming the Watchdog Timer A-2
A.1 Programming
GENE-6350 utilizes Winbond W83697UF chipset as its
watchdog timer controller.Below are the procedures to
complete its configuration and theAAEON intial watchdog
timer program is also attached based onwhich you can
develop customized program to fit your application.
WatchDog Timer Configuration Registers
Logical Device 8
CRF3---Select WDTO count mode
CRF4---Default 0X00
CRF5—Watch Dog Timer status
CRF3 (PLED mode register. Default 0 x 00)
Bit Reserved
[7:3]:
Bit 2: select WDTO count mode.
0 second
1 minute
CRF4---Default 0X00
Watchdog Timer Time-out value. Writing a non-zero value to this
register causes the counter to load the value to watchdog counter
and start counting down. Reading this register returns current value
in watchdog counter instead of watchdog timer time-out value.
Bit [7:0]: = 0 x 00 Time-out Disable
= 0 x 01 Time-out occurs after 1 second/minute
= 0 x 02 Time-out occurs after 2 second/minutes
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