ABB HiPerGuard MV UPS - Page 78

USER INTERFACE
HIPERGUARD MV UPS
USER MANUAL
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103
ID Event Description
W5.211
Demand Response Power Controller
communications link invalid
There is a communication problem between the
Demand Response Power Controller and the MV
UPS.
W5.213
Demand Response Power Controller
limiting charging
The Demand Response Controller is LIMITING STATE
OF CHARGE of the Energy Storage.
W5.215
Energy Storage communications link
not valid
There is a communication problem between the
Energy Storage and the MV UPS.
W5.221 PEBB Group AC imbalance high
An imbalance of utility or load is causing excess 2nd
harmonic ripple.
W5.228 Test Mode without switchgear enabled
Test Mode has been requested without MV
Switchgear being enabled.
W5.230 Input current imbalance high
High level of current imbalance has been detected
on the input grid.
W5.231 Output current imbalance high
High level of current imbalance has been detected
on the UPS output.
Table 7.3: List of Warnings and description
7.1.6.2. List of Faults
ID Event Description
F5.23 DC bus voltage too high
The average DC bus voltage has been detected as
too high. The system has TRIPPED and the load has
been transferred to BYPASS.
F5.26 DC bus voltage too low
The averaged DC Bus voltage has fallen to a level
where storage is deemed to be depleted.
The system has TRIPPED and the load has been
transferred to BYPASS.
F5.31 Energy Storage strings insufficient
The expected number of energy storage strings are
not available to allow the system to continue
running. The system has TRIPPED, and the load has
been transferred to BYPASS.
F5.47 System DC volts measurement error
There is a discrepancy between the various DC
voltage measurements in DC bus and in PCS-120
modules.
F5.52 PE120 DC volts measurement invalid
By comparison of Energy Storage Bus voltage and
DC Bus voltage measurements in each inverter
module, it has been determined one or more of
these measurements is invalid.
F5.84 PS to MB Comms Low
The Master Controller CPU has indicated a
communications handshake failure.
F5.85 UC to ML 0 link failure
The CPU in the DLL IO block has indicated a failure
in communications handshake between UC and ML
link 0.