Acrosser Technology AR-B1579 - I;O Channel Signal Description

AR-B1579 User’s Guide
2-4
A19 SA12 Input/Output B19 -REFRESH Input/Output
A20 SA11 Input/Output B20 BUSCLK Output
A21 SA10 Input/Output B21 IRQ7 Input
A22 SA9 Input/Output B22 IRQ6 Input
A23 SA8 Input/Output B23 IRQ5 Input
A24 SA7 Input/Output B24 IRQ4 Input
A25 SA6 Input/Output B25 IRQ3 Input
A26 SA5 Input/Output B26 -DACK2 Output
A27 SA4 Input/Output B27 TC Output
A28 SA3 Input/Output B28 BALE Output
A29 SA2 Input/Output B29 +5V Power
A30 SA1 Input/Output B30 OSC Output
A31 SA0 Input/Output B31 GND Ground
Table 2-3 I/O Channel Pin Assignment
I/O Pin Signal Name Input/Output I/O Pin Signal Name Input/Output
C1 -SBHE Input/Output D1 -MEMCS16 Input
C2 LA23 Input/Output D2 -IOCS16 Input
C3 LA22 Input/Output D3 IRQ10 Input
C4 LA21 Input/Output D4 IRQ11 Input
C5 LA20 Input/Output D5 IRQ12 Input
C6 LA19 Input/Output D6 IRQ15 Input
C7 LA18 Input/Output D7 IRQ14 Input
C8 LA17 Input/Output D8 -DACK0 Output
C9 -MRD16 Input/Output D9 DRQ0 Input
C10 -MWR16 Input/Output D10 -DACK5 Output
C11 SD8 Input/Output D11 DRQ5 Input
C12 SD9 Input/Output D12 -DACK6 Output
C13 SD10 Input/Output D13 DRQ6 Input
C14 SD11 Input/Output D14 -DACK7 Output
C15 SD12 Input/Output D15 DRQ7 Input
C16 SD13 Input/Output D16 +5V Power
C17 SD14 Input/Output D17 -MASTER Input
C18 SD15 Input/Output D18 GND Ground
Table 2-4 I/O Channel Pin Assignment
2.3.3 I/O Channel Signal Description
Name Description
CLK [Output]
The CLK signal of the I/O channel is asynchronous to
the CPU clock.
RSTDRV [Output]
This signal goes high during power-up, low line-voltage
or hardware reset
SA0 - SA19
[Input / Output]
The System Address lines run from bit 0 to 19. They are
latched onto the falling edge of "BALE"
LA17 - LA23
[Input/Output]
The Unlatched Address line run from bit 17 to 23
SD0 - SD15
[Input/Output]
System Data bit 0 to 15
BALE [Output]
The Buffered Address Latch Enable is used to latch SA0
- SA19 onto the falling edge. This signal is forced high
during DMA cycles
-IOCHCK [Input]
The I/O Channel Check is an active low signal which
indicates that a parity error exist on the I/O board