2.5.3 DRAM RAS# to CAS# Delay
When DRAM
Timing selectable
is set to [Manual], this
field
is adjust- able.
When
DRAM is
refreshed, the
rows and columns
are addressed
separately.
This setup
item allows user to
determine the
timing of
the transition
from RAS (row address
strobe)
to
CAS (column address strobe).
The less the clock
cycles are, the faster
the DRAM
speed
is. Set- ting
options are [2T]
to
[5T], and [Auto].
2.5.4 DRAM RAS# Precharge
When the DRAM
Timing Selectable
is set to [Manual], this
field
is adjustable.
This
setting controls
the number of cycles
for
Row Address Strobe (RAS) to be allowed
to precharge. If no sufficient time
is
allowed for the
RAS to accumulate
its
charge
before DRAM
refresh,
refreshing may be incomplete and DRAM
may fail to retain
data. This
item
applies only when synchronous
DRAM
is installed in the system.
Setting
options are [2T] to [5T],
and
[Auto].
2.5.5 Precharge Delay (t
RAS)
This item
allows
you to select the
value
in this
field, depending
on whether the
board has paged DRAMs
or EDO (extended data
output) DRAMs.
The choices
are: “4”
to “15” and “Auto”.
2.5.6 System Memory Frequency
To adjust the
frequency of
memory. The choices are:
“333MHz”,
“400MHz”, “533MHz” and “Auto”.
2.5.7 System BIOS
Cacheable
Selecting “Enabled” allows caching
of the system BIOS ROM
at F0000h- FFFFFh,
resulting in better system
performance.
However, if any
pro- gram writes data to
this
memory
area, a
system error
may occur. The Choices are “Enabled”, and
“Disabled”.
2.5.8 Video BIOS
Cacheable
Selecting “Enabled” allows caching
of the
video BIOS, resulting in
better system
performance. However, if
any program writes
to this memory area, a system error
may occur. The choices are “Enabled”, and
“Disabled”.
2.5.9 Memory Hole At 15M-16M
Enabling this feature reserves
15 MB
to 16 MB memory address space for
ISA
expansion
cards that specifically require this
setting. This makes memory
from 15
MB and up
unavailable to the
system.
Expansion
cards can
only access
memory up
to 16 MB.
The default
setting is “Disabled”.
2.5.10
PEG/Onchip VGA Control
The selections are “Auto”, “Onchip VGA” or “PEG Port”.
2.5.11
On-Chip Frame Buffer Size
The On-Chip Frame Buffer Size can be set
to 1 MB or 8 MB.
This
memory is
shared
with the system
memory.
AIMB-763 2-9
To Next Page
Loading...
Need help?
General
