90 Principles of Operation
is controlled by the combination of a password and jumper options on header A3J3, located on front panel board (see
Calibration in the Operating Manual). In addition, for models Agilent 664xA and 665xA, the front panel EEPROM can be
updated from the GPIB interface, whereas, the memory circuits used in models Agilent 654xA and 655xA cannot be
programmed via the GPIB interface.
If the EEPROM should fail in models 654xA and 655xA, two options exist. The first option is to replace the front panel
board with another front panel board, having an EEPROM already preprogrammed from the factory. The second option is to
reprogram the new EEPROM, using an auxiliary GPIB board, available from the Agilent Technologies Sales and Support
Office.
Note The EEPROM for each power supply model is programmed with unique data during initialization.
Jumper block A3J3 is located on the front panel board. This jumper block is strapped differently according to the service
testing and/or calibration to be performed. The connections on the A3J3 jumper block are as follows:
FAC CAL Loads memory with initial factory values from EEPROM for calibration purposes. No password is
required (this permits the password requirement to be overridden).
INH CAL Inhibits calibration.
SA MODE Used with signature analysis troubleshooting.
NORMAL Normal operation.
As shipped from the factory, this jumper block is connected for normal operation.
A2 GPIB Board Circuits For Agilent Models 664xA and 665xA Only
The circuits on the A2 GPIB Board (see Figure 4-6) provide the interface between the GPIB controller and the power
supply. All communication between the power supply and a GPIB controller is processed by the GPIB interface and the
primary microprocessor circuits on the A2 board.
The primary microprocessor circuits (microprocessor, ROM, and RAM chips) decode and execute all instructions and
control all data transfers between the GPIB controller and the secondary interface. The primary microprocessor also
processes measurement and status data received from the secondary interface.
A UART (universal asynchronous receive/transmit) chip on the A2 board converts the primary microprocessor’s 8-bit bus
into a serial I/O port.
The serial data is transferred between the primary interface and the secondary interface via a programmed GAL (gated array
logic) chip and optical isolator chips. These chips isolate the primary interface circuits (referenced to earth ground) from the
secondary interface circuits (referenced to power supply common). The GAL chip also provides a serial I/O port to the front
panel, thus allowing the power supply to be controlled from the front panel.
The serial link interface on the A2 GPIB board allows up to sixteen supplies to be connected together and to be
programmed from one GPIB address. The first supply is the only supply connected directly to the GPIB controller and is set
to the primary GPIB address. The remaining supplies are programmed to secondary addresses and are linked (daisy
chained) together via the J1/J2 phone jacks on the rear of each supply.
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