Publication 1762-RM001C-EN-P
5-8 Using the High-Speed Counter
User Interrupt Enable (UIE)
The UIE (User Interrupt Enable) bit is used to enable or disable HSC
subroutine processing. This bit must be set (1) if the user wants the
controller to process the HSC subroutine when any of the following
conditions exist:
•
Low preset reached
•
High preset reached
•
Overflow condition - count up through the overflow value
•
Underflow condition - count down through the underflow value
If this bit is cleared (0), the HSC sub-system does not automatically scan
the HSC subroutine. This bit can be controlled from the user program
(using the OTE, UIE, or UID instructions).
User Interrupt Executing (UIX)
The UIX (User Interrupt Executing) bit is set (1) whenever the HSC
sub-system begins processing the HSC subroutine due to any of the
following conditions:
•
Low preset reached
•
High preset reached
•
Overflow condition - count up through the overflow value
•
Underflow condition - count down through the underflow value
The HSC UIX bit can be used in the control program as conditional logic
to detect if an HSC interrupt is executing.
The HSC sub-system will clear (0) the UIX bit when the controller
completes its processing of the HSC subroutine.
Description Address Data
Format
HSC
Modes
(1)
(1) For Mode descriptions, see HSC Mode (MOD) on page 5-16.
Type User Program
Access
UIE - User Interrupt Enable HSC:0/UIE bit 0 to 7 control read/write
ATTENTION
!
If you enable interrupts during the program scan via an
OTL, OTE, or UIE, this instruction must be the last
instruction executed on the rung (last instruction on last
branch). It is recommended this be the only output
instruction on the rung.
Description Address Data
Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (MOD) on page 5-16.
Type User Program
Access
UIX - User Interrupt Executing HSC:0/UIX bit 0 to 7 status read only
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