AMD Athlon User Manual

BIOS
Page 4-9
Memory Timings
For setting DRAM Timing.
Options: Optimal, Aggressive, Turbo, Expert.
T (RAS)
This item specifies the number of clock cycles needed after a bank active command
before a precharge can occur (sets the minimum RAS pulse width.).
Options: 1 ~ 15.
T (RCD)
This item sets the timing parameters for the system memory such as the CAS (Column
Address Strobe) and RAS (Row Address Strobe).
Options: 1 ~ 7.
T (RP)
This item refers to the number of cycles required to return data to its original
location to close the bank or the number of cycles required to page memory before
the next bank activate command can be issued.
Options: 1 ~ 7.
CAS Latency
Enables you to select the CAS latency time. The value is set at the factory depending
on the DRAM installed. Do not change the values in this field unless you change
specifications of the installed DRAM.
Options: 2.0, 2.5, 3.0.
FSB Spread Spectrum
This item can significantly reduce the EMI (ElectroMagnetic Interference) generated
by the CPU.
Options: Disabled, 0.50%, 1.00%.
AGP Spread Spectrum
This item can significantly reduce the EMI (ElectroMagnetic Interference) generated
by the AGP.
Options: Disabled, 0.50%, 1.00%.

AMD Athlon Specifications

General

Microarchitecture	K7
Architecture	x86
Manufacturer	AMD
Core Count	1
Thread Count	1
Socket	Socket A
Manufacturing Process	180 nm
L1 Cache	128 KB (64 KB Instruction + 64 KB Data)
L2 Cache	64 KB to 512 KB
Clock Rate	500 MHz
FSB	100 MHz