AMD Xilinx ZCU670 - Page 38

The ZCU670 board uses a Standard Microsystems Corporaon USB3320 USB 2.0 ULPI
Transceiver (U6) to support a USB connecon to the host computer. A USB cable is supplied in
the ZCU670 Evaluaon Kit (standard-A connector to host computer, USB 3.0 A connector to
ZCU670 board connector J18). The USB3320 is a high-speed USB 2.0 PHY supporng the UTMI
+ low pin interface (ULPI) interface standard. The ULPI standard denes the interface between
the USB controller IP and the PHY device which drives the physical USB bus. Use of the ULPI
standard reduces the interface pin count between the USB controller IP and the PHY device.
The following gure shows the USB 3.0 interface. USB 3.0 is host mode only.
Figure 12: USB Interface
SM3320
USB2.0
USB
MIO
ULPI
GTR Tx, Rx
USB3
Connector
USB
GTR
X23650-032720
The USB3320 is clocked by a 24 MHz crystal (X2). See the Standard Microsystems Corporaon
USB3320 data sheet for clocking mode details.
The interface to the USB3320 PHY is implemented through the IP in the ZU67DR RFSoC
Processor System (PS). USB OTG support is available for USB 2.0. See Table 3 for USB 2.0 jumper
sengs.
Note: The shield for the USB 3.0 micro-B connector (J18) can be ed to GND by a jumper on header J20
pins 2-3 (default). The USB shield can oponally be connected through a series capacitor to GND by
installing a capacitor (body size 0402) at locaon C204 and jumping pins 1-2 on header J20.
The USB3320 ULPI U6 transceiver circuit (see the following gure) has a Micrel MIC2544 high-
side programmable current limit switch (U7). This switch has an open-drain output fault ag on
pin 2, which will turn on LED DS7 if overcurrent or thermal shutdown condions are detected.
DS7 is located adjacent to the USB J18 connector (Figure 2, callout 6).
The following gure shows the ULPI U6 transceiver circuit.
Chapter 3: Board Component Descriptions
UG1532 (v1.0) March 30, 2022 www.xilinx.com
ZCU670 Board User Guide 38
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