Analog Devices SigmaDSP ADAU1463 - Page 40

UG-1134 EVAL-ADAU1467Z
Rev. A (Draft) | Page 40 of 55
Figure 102. Self-Boot SPI Memory Schematic
Figure 103. Self-Boot, MP15, MP7, and MP14 DIP Switch Schematic
Figure 104. Serial Port Header Schematic
1
CS
2
SO
3
WP
4
VSS
8
VCC
7
HOLD
6
SCK
5
SI
U10
25AA1024_1MBIT_SPI_EEPROM
SCLK_MMOSI_M
SS_M
MISO_M
SCLK_M
MOSI_M
MISO_M
SS_M
IOVDD
R76
10k0
C76
0.10µF
5
6
7
8 1
2
3
4
S3
SELFBOOT
IOVDD
MP15
MP7
MP14
ON
4-POS DIP SWITCH
R78
10k0
R77
10k0
R47
10k0
R44
10k0
12
10
8
11
9
7
5
3
1
6
4
2
J8
BCLK_IN0
LRCLK_IN0
SDATA_IN0
SDATA_IN3
LRCLK_IN3
BCLK_IN3
BCLK_OUT3
SDATA_OUT3
LRCLK_OUT2
BCLK_OUT2
SDATA_OUT2
LRCLK_OUT3
12
10
8
11
9
7
5
3
1
6
4
2
J9
5
3
1
6
4
2
1467_CLKOUT4
IOVDD
5V00_UNREG
J4
5
3
1
6
4
2
BCLK_OUT1
LRCLK_OUT1
SDATA_OUT1
J19
DRAFT