Analog Devices SigmaDSP ADAU1463 User Manual

UG-1134 EVAL-ADAU1467Z
Rev. A (Draft) | Page 30 of 55
EVALUATION BOARD SCHEMATICS AND ARTWORK
Figure 83. SigmaDSP Audio Processor Schematic
EXPOSED PAD
DVDD
DVDDDVDD
IOVDD
IOVDD
GND
GND
IOVDD
AVDD DVDD
GND
PVDD
To Slave Control
Port (USBi)
To Master
Control Port
Secondary I2C
To CODEC &
Peripheral Cntl Out
To J19 &
SDP Connector
To J9 To J9
To CODEC
From SDP
Connector
(& Header J8)
From ADCs
(CODEC)
To DACs (CODEC)
To Mic Canvas
Connector
To
Switch S8
From Mic
Canvas
Connector
From
Header J8
XTAL OSC
C14
0.10uF
C9
0.10uF
C12
0.10uF
C17
0.10uF
C43
0.10uF
C41
0.10uF
C45
0.10uF
C40
0.10uF
C22
0.10uF
C20
0.10uF
C46
10uF
C13
10uF
C99
10uF
C18
10uF
C15
10nF
C16
10nF
C42
C44
10nF
C10
22pF
C8
22pF
Y1
12.288 MHz
R9
100R
R10
33R2
PVDD
PLLFILT
DGND
IOVDD
DGND DVDD XTALIN/MCLK XTALOUT CLKOUT RESET DGND SCL2_M/MP24 SDA2_M/MP25 SS_M/MP0 MOSI_M/MP1 SCLK_M/MP2 MISO_M/MP3 DGND
VDRIVE
SPDIFIN
SPDIFOUT
MP14
MP15
AGND
AVDD
AUXADC0
AUXADC1
AUXADC2
AUXADC3
AUXADC4
AUXADC5
AUXADC6
AUXADC7
PGND
DGND DVDD SELFBOOT SS/ADDR0 MOSI/ADDR1 SCLK/SCL MISO/SDA
23 24 25 26 27 28 29 30 31 32 33 34 35 36 44 43 42 41 40 39 38 37
IOVDD
IOVDD
19
20
21
22
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
2
1
DGND
72 71 70 69 68 67 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
SDATAIO0/MP16 SDATAIO1/MP17 SDATAIO2/MP18 SDATAIO3/MP19
IOVDD
DGND
BCLK_IN0
LRCLK_IN0/MP10
SDATA_IN0
BCLK_IN1
LRCLK_IN1/MP11
SDATA_IN1
THD_M
THD_P
BCLK_IN2
LRCLK_IN2/MP12
SDATA_IN2
BCLK_IN3
LRCLK_IN3/MP13
SDATA_IN3
DVDD
DGND
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
89
DGND
DVDD
SDATAIO4/MP20
SDATAIO5/MP21
SDATAIO6/MP22
SDATAIO7/MP23
SDATA_OUT3
BCLK_OUT3
LRCLK_OUT3/MP9
SDATA_OUT2
BCLK_OUT2
LRCLK_OUT2/MP8
MP7
MP6
SDATA_OUT1
BCLK_OUT1
LRCLK_OUT1/MP5
SDATA_OUT0
BCLK_OUT0
LRCLK_OUT0/MP4
IOVDD
DGND
EP
U2
ADAU1467WBCPZ300
C11 0.10uF
R19 33R2
R18 33R2
R23 33R2 R22 33R2
33R2 33R2 33R2
R20
0R47
AUXADC7
AUXADC6
AUXADC5
AUXADC4
AUXADC3
AUXADC2
THD_M
THD_P
R148 33R2
R75 R150 R151
R12
R14
R35
0R00
BA
J3
DVDD
IOVDD
3V3_A
3V3_A
RESET
SCLK
MOSI
SS
SPDIFOUT
SPDIFIN
SS_M
MOSI_M
SCLK_M
MISO_M
MISO
SELFBOOT
WRITEBACK_MP6
MP7
CLKOUT
AUXADC0
AUXADC1
MP14
MP15
MP24 MP25
LRCLK_OUT2
BCLK_OUT2
BCLK_OUT3
SDATA_OUT2
LRCLK_OUT3
SDATA_OUT3
SDATA_IN3 BCLK_IN3 LRCLK_IN2 BCLK_IN2 SDATA_IN1 LRCLK_IN1 BCLK_IN1 SDATA_IN0 LRCLK_IN0 BCLK_IN0
DAC3_SDATAIO7 DAC2_SDATAIO6 DAC1_SDATAIO5 ADC1_SDATAIO4
MC_LED_SDATA_SDATAIO3_MP19
SDATAIO0
MC_LED_SCLK_SDATAIO2_MP18 MC_TDM8_SDATAIO1_MP17
SDATA_OUT1
LRCLK_OUT1
SDATA_OUT0
BCLK_OUT0
LRCLK_OUT0
LRCLK_IN3 SDATA_IN2
SDP_MCLK_IN
EXTERNAL MCLK INPUT
BCLK_OUT1
PVDD
PLLFILT
R11
4K32
C21
150pF
C19
5.6nF
R107
1k00
R105 0R00 R106 0R00
B
C
E
Q1
STD2805
VDRIVE
DVDD
R73
10k0
IOVDD
33R2 33R2
DRAFT

Analog Devices SigmaDSP ADAU1463 Specifications

General

Brand	Analog Devices
Model	SigmaDSP ADAU1463
Category	Computer Hardware
Language	English