CHAPTER 1 INTRODUCTION
1.1 OVERVIEW ........................................................................................ 1–1
1.1.1 Functional Units........................................................................... 1–1
1.1.2 Memory And System Interface .................................................. 1–3
1.1.3 Instruction Set .............................................................................. 1–4
1.1.4 DSP Performance ......................................................................... 1–4
1.2 CORE ARCHITECTURE .................................................................. 1–5
1.2.1 Computational Units................................................................... 1–6
1.2.2 Address Generators & Program Sequencer ............................. 1–7
1.2.3 Buses ........................................................................................ 1–8
1.3 ON-CHIP PERIPHERALS ................................................................ 1–8
1.3.1 Serial Ports .................................................................................... 1–8
1.3.2 Timer ........................................................................................ 1–9
1.3.3 Host Interface Port....................................................................... 1–9
1.3.4 DMA Ports .................................................................................... 1–9
1.3.5 Analog Interface......................................................................... 1–10
1.4 ADSP-2100 FAMILY DEVELOPMENT TOOLS ......................... 1–10
1.5 ORGANIZATION OF THIS MANUAL ....................................... 1–11
CHAPTER 2 COMPUTATIONAL UNITS
2.1 OVERVIEW ........................................................................................ 2–1
2.1.1 Binary String................................................................................. 2–1
2.1.2 Unsigned ....................................................................................... 2–1
2.1.3 Signed Numbers: Twos-Complement ...................................... 2–1
2.1.4 Fractional Representation: 1.15.................................................. 2–2
2.1.5 ALU Arithmetic ........................................................................... 2–2
2.1.6 MAC Arithmetic .......................................................................... 2–3
2.1.7 Shifter Arithmetic ........................................................................ 2–3
2.1.8 Summary ....................................................................................... 2–4
2.2 ARITHMETIC/LOGIC UNIT (ALU).............................................. 2–5
2.2.1 ALU Block Diagram Discussion ................................................ 2–5
2.2.2 Standard Functions...................................................................... 2–7
2.2.3 ALU Input/Output Registers .................................................... 2–8
2.2.4 Multiprecision Capability........................................................... 2–8
2.2.5 ALU Saturation Mode ................................................................. 2–8
2.2.6 ALU Overflow Latch Mode ....................................................... 2–9
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