A.1 OPCODES
This appendix gives a summary of the complete instruction set of the
ADSP-2100 family processors. Opcode field names are defined at the end
of the appendix. Any instruction codes not shown are reserved for future
use.
Type 1: ALU / MAC with Data & Program Memory Read
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 PD DD AMF Yop Xop PM PM DM DM
I M I M
Type 2: Data Memory Write (Immediate Data)
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 0 1 G DATA I M
Type 3: Read /Write Data Memory (Immediate Address)
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 0 0 D RGP ADDR REG
Type 4: ALU / MAC with Data Memory Read / Write
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 1 1 G D Z AMF Yop Xop DREG I M
Type 5: ALU / MAC with Program Memory Read / Write
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 1 0 1 D Z AMF Yop Xop DREG I M
AInstruction Coding
A – 1
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