8Analog Interface
8 – 11
DM[0x3FEF]
Analog Autobuffer/Powerdown Control Register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ATBUF
DAC Transmit Autobuffer Enable
ARBUF
ADC Receive Autobuffer Enable
ARMREG
Receive M register
ARIREG
Receive I register
ATMREG
Transmit M register
ATIREG
Transmit I register
Processor powerdown control bits.
(See Chapter 9, “System Interface”)
DM(0x3FEF)
Figure 8.5 Analog Autobuffer/Powerdown Control Register
Bits 12–15 of the analog autobuffer/powerdown register control the
ADSP-21msp58/59’s processor powerdown function, not powerdown
of the analog interface—powerdown of the analog interface only is
controlled by the APWD bits (bits 5, 6) of the analog control register.
The ADSP-21msp58/59’s powerdown function is described in the
“Powerdown” section of Chapter 9, System Interface.
8.4.2 Memory-Mapped Data Registers
There are two memory-mapped data registers dedicated to the analog
interface. The 16-bit ADC receive data register is located at address
0x3FED in data memory. The 16-bit DAC transmit data register is
located at address 0x3FEC in data memory. These registers must be
individually read and written when autobuffering is not in use
(autobuffering automatically transfers the data to and from processor
data memory).
When autobuffering is disabled, data must be transmitted to the
sigma-delta DAC by writing a 16-bit word to the DAC transmit
register (0x3FEC) and data must be received from the sigma-delta ADC
by reading a 16-bit word from the ADC receive register (0x3FED).
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