15
15 – 43
Z: Destination register COND: condition
Xop: X operand register
Syntax: [ IF cond ] MR = MR + xop
*
yop (SS) ;
MF xop (SU)
(US)
(UU)
(RND)
Permissible xops Permissible yops Permissible conds (see Table 15.9)
MX0 AR MY0 EQ LE AC
MX1 SR1 MY1 NE NEG NOT AC
MR2 SR0 MF GT POS MV
MR1 GE AV NOT MV
MR0 LT NOT AV NOT CE
Examples: IF GE MR = MR + MX0
*
MY1 (SS) ; xop
*
yop
MR = MR + MX0
*
MX0 (SS); xop
*
xop
Description: Test the optional condition and, if true, then multiply the
two source operands, add the product to the present contents of the MR
register, and store the result in the destination location. If the condition is
not true then perform a no-operation. Omitting the condition performs the
multiply/accumulate unconditionally. The operands are contained in the
data registers specified in the instruction. When MF is the destination
operand, only bits 31-16 of the 40-bit result are stored in MF.
The xop
*
xop squaring operation is only available on the ADSP-217x,
ADSP-218x, and ADSP-21msp58/59 processors. Both xops must be the
same register. This option allows single-cycle X
2
and ∑X
2
instructions.
The data format selection field to the right of the two operands specifies
whether each respective operand is in signed (S) or unsigned (U) format.
The xop is specified first and yop is second. If the xop
*
xop operation is
used, the data format selection field must be (UU), (SS), or (RND) only.
There is no default; one of the data formats must be specified.
If RND (Round) is specified, the MAC multiplies the two source operands,
adds the product to the current contents of the MR register, rounds the
result to the most significant 24 bits (or rounds bits 31-16 to the nearest 16
bits if there is no overflow from the multiply/accumulate), and stores the
result in the destination register. The two multiplication operands xop and
yop (or xop and xop) are considered to be in twos complement format. All
(instruction continues on next page)
MAC
MULTIPLY / ACCUMULATE
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