Analog Devices adsp-2100 User Manual

2 Computational Units
2 – 2
2.1.4 Fractional Representation: 1.15
ADSP-2100 family arithmetic is optimized for numerical values in a
fractional binary format denoted by 1.15 (“one dot fifteen”). In the 1.15
format, there is one sign bit (the MSB) and fifteen fractional bits
representing values from –1 up to one LSB less than +1.
Figure 2.1 shows the bit weighting for 1.15 numbers. Below are examples
of 1.15 numbers and their decimal equivalents.
1.15 Number Decimal Equivalent
0x0001 0.000031
0x7FFF 0.999969
0xFFFF –0.000031
0x8000 –1.000000
–2
0
2
–1
2
–2
2
–3
2
–4
2
–5
2
–6
2
–7
2
–8
2
–9
2
–10
2
–11
2
–12
2
–13
2
–14
2
–15
2.1.5 ALU Arithmetic
All operations on the ALU treat operands and results as simple 16-bit
binary strings, except the signed division primitive (DIVS). Various status
bits treat the results as signed: the overflow (AV) condition code, and the
negative (AN) flag.
The logic of the overflow bit (AV) is based on twos-complement
arithmetic. It is set if the MSB changes in a manner not predicted by the
signs of the operands and the nature of the operation. For example,
adding two positive numbers must generate a positive result; a change in
the sign bit signifies an overflow and sets AV. Adding a negative and a
positive may result in either a negative or positive result, but cannot
overflow.
The logic of the carry bit (AC) is based on unsigned-magnitude arithmetic.
It is set if a carry is generated from bit 16 (the MSB). The (AC) bit is most
useful for the lower word portions of a multiword operation.
Figure 2.1 Bit Weighting For 1.15 Numbers

Analog Devices adsp-2100 Specifications

General

Brand	Analog Devices
Model	adsp-2100
Category	Computer Hardware
Language	English