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Syntax: DM ( <addr> ) = reg ;
Permissible registers
AX0 MX0 SI SB CNTR
AX1 MX1 SE PX RX0
AY0 MY0 SR1 ASTAT RX1
AY1 MY1 SR0 MSTAT TX0
AR MR2 I0-I7 SSTAT(read only) TX1
MR1 M0-M7 IMASK
MR0 L0-L7 ICNTL
Example: DM (cntl_port0 ) = AR;
Description: Moves the contents of the source register to the data
memory location specified in the instruction word. The addressing mode
is direct addressing (designated by an immediate address value or by a
label). The data memory address is stored directly in the instruction word
as a full 14-bit field. Whenever a register less than 16 bits in length is
written to memory, the value written is either sign-extended to the left if
the source is a signed value, or zero-filled to the left if the source is an
unsigned value. The unsigned registers which are zero-filled to the left
are: I0 through I7, L0 through L7, CNTR, PX, ASTAT, MSTAT, SSTAT,
IMASK, and ICNTL. All other registers are sign-extended to the left.
The contents of the source are always right-justified in the destination
location after the write (bit 0 maps to bit 0).
Note that whenever MR1 is loaded with data, it is sign-extended into
MR2.
Status Generated: None affected.
Instruction Format:
Data Memory Read (Direct Address), Instruction Type 3:
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 0 0 1 RGP ADDR REG
ADDR contains the direct address of the destination location in Data
Memory.
RGP (Register Group) and REG (Register) select the source register
according to the Register Selection Table (see Appendix A).
MOVE
DATA MEMORY WRITE (Direct Address)
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