9System Interface
9 – 5
Processor Reboot Method Description
ADSP-2101 Boot Force Setting the BFORCE bit in the System
ADSP-2105 Control Register causes a reboot
ADSP-2111
ADSP-2115
ADSP-2171 Boot Force Setting the BFORCE bit in the System
Control Register causes a reboot
Powerup Context Reset Setting the PUCR bit in the SPORT1
Autobuffer & Powerdown Control
Register causes a reboot on recovery
from powerdown
ADSP-2181 BDMA Context Reset Setting the BCR bit in the BDMA
Control Register before writing to the
BDMA Word Count Register
(BWCOUNT) causes a reboot.
Execution starts after the BDMA reboot
is completed.
Powerup Context Reset Setting the PUCR bit in the SPORT1
Autobuffer & Powerdown Control
Register causes a reboot on recovery
from powerdown
Table 9.1 Software-Forced Rebooting
Tables 9.2–9.7 show the state of the processor registers after a software-
forced reboot. The values of any registers not listed are unchanged by a
reboot.
During booting (and rebooting), all interrupts including serial port
interrupts are masked and autobuffering is disabled. The serial port(s)
remain active; one transfer—from internal shift register to data register—
can occur for each serial port before there are overrun problems.
The timer runs during a reboot. If a timer interrupt occurs during the
reboot, it is masked. Thus, if more than one timer interrupt occurs during
the reboot, the processor latches only the first. A timer overrun can occur.
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