Computational Units
2 – 5
2
2.2 ARITHMETIC/LOGIC UNIT (ALU)
The arithmetic/logic unit (ALU) provides a standard set of arithmetic and
logical functions. The arithmetic functions are add, subtract, negate,
increment, decrement and absolute value. These are supplemented by two
division primitives with which multiple cycle division can be constructed.
The logic functions are AND, OR, XOR (exclusive OR) and NOT.
2.2.1 ALU Block Diagram Discussion
Figure 2.2, on the following page, shows a block diagram of the ALU.
The ALU is 16 bits wide with two 16-bit input ports, X and Y, and one
output port, R. The ALU accepts a carry-in signal (CI) which is the carry
bit from the processor arithmetic status register (ASTAT). The ALU
generates six status signals: the zero (AZ) status, the negative (AN) status,
the carry (AC) status, the overflow (AV) status, the X-input sign (AS)
status, and the quotient (AQ) status. All arithmetic status signals are
latched into the arithmetic status register (ASTAT) at the end of the cycle.
Please see the “Instruction Set Reference” chapter of this manual for
information on how each instruction affects the ALU flags.
The X input port of the ALU can accept data from two sources: the AX
register file or the result (R) bus. The R bus connects the output registers of
all the computational units, permitting them to be used as input operands
directly. The AX register file is dedicated to the X input port and consists
of two registers, AX0 and AX1. These AX registers are readable and
writable from the DMD bus. The instruction set also provides for reading
these registers over the PMD bus, but there is no direct connection; this
operation uses the DMD-PMD bus exchange unit. The AX register file
outputs are dual-ported so that one register can provide input to the ALU
while either one simultaneously drives the DMD bus.
The Y input port of the ALU can also accept data from two sources: the
AY register file and the ALU feedback (AF) register. The AY register file is
dedicated to the Y input port and consists of two registers, AY0 and AY1.
These registers are readable and writable from the DMD bus and writable
from the PMD bus. The instruction set also provides for reading these
registers over the PMD bus, but there is no direct connection; this
operation uses the DMD-PMD bus exchange unit. The AY register file
outputs are also dual-ported: one AY register can provide input to the
ALU while either one simultaneously drives the DMD bus.
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