9System Interface
9 – 17
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Programmable Flag Data
PFDATA
DM(0x3FE5)
Figure 9.5 Programmable Flag Data Register (ADSP-2181)
9.7 POWERDOWN
The ADSP-2171, ADSP-2181, and ADSP-21msp58/59 provide a
powerdown feature that allows the processor to enter a very low power
dormant state through hardware or software control. In this CMOS
standby state, power consumption is less than 1 mW (approximate). (Refer
to the processor data sheet for exact power consumption specifications.)
The powerdown feature is useful for applications where power
conservation is necessary, for example in battery-powered operation.
Features of powerdown include:
• Internal clocks are disabled
• Processor registers and memory contents are maintained
• Ability to recover from powerdown in less than 100 CLKIN cycles
• Ability to disable internal oscillator when using crystal
• No need to shut down clock for lowest power when using external
oscillator
• Interrupt support for executing “housekeeping” code before entering
powerdown and after recovering from powerdown
• User selectable powerup context
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