8 Analog Interface
8 – 16
8.5 CIRCUIT DESIGN CONSIDERATIONS
The following sections discuss interfacing analog signals to the
ADSP-21msp58/59.
8.5.1 Analog Signal Input
Figure 8.6 shows the recommended input circuit for the
ADSP-21msp58/59’s analog input pin (either VIN
NORM
or VIN
AUX
).
The circuit of Figure 8.6 implements a first-order low pass filter (R
1
C
1
).
The 3 dB point of the filter should be less than 40 kHz. This is the only
filter that must be implemented external to the processor to prevent
aliasing of the sampled signal. Since the ADSP-21msp58/59’s sigma-
delta ADC uses a highly oversampled approach that transfers most of
the anti-aliasing filtering into the digital domain, the off-chip anti-
aliasing filter need only be of low order. Refer to the ADSP-21msp58/59
Data Sheet for more detailed information.
The ADSP-21msp58/59’s on-chip ADC PGA (programmable gain
amplifier) can be used when there is not enough gain in the input
circuit. The ADC PGA is configured by bits 9 and 0 (IG1, IG0) of the
processor’s analog control register. The gain must be selected to ensure
that a full-scale input signal (at R
1
in Figure 8.6) produces a signal level
at the input to the sigma-delta modulator of the ADC that does not
exceed V
INMAX
(which is specified in the data sheet).
Figure 8.6 Recommended Analog Input Circuit
MUX
±
C
2
C
3
VIN
AUX
VIN
NORM
C
1
R
1
INPUT
SOURCE
ADSP-21msp5x
DECOUPLE
STAR
GROUND
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