11 DMA Ports
11 – 4
11.2.1 BDMA Port Functional Description
The BDMA Port lets you load (and store) program instructions and data
from (and to) byte memory with very low processor overhead. While the
ADSP-2181 is executing program instructions, the BDMA port reads (or
writes) code or data from (or to) byte memory—stealing one ADSP-2181
cycle per word when it needs to write to (or read from) internal memory.
You can calculate BDMA transfer time from the formula:
Number Number Number 1 1
of PM of Bytes of Added Cycle Cycle for Hold
or DM per Word Waitstates for Internal Offs
Words per Byte Transfer
RD/WR
++ +
If, for example, you wanted to transfer 100 24-bit program memory words
through the BDMA port, assuming five waitstates and no hold offs, the
operation would take 1900 cycles. This is shown in the following equation:
100 3 5 1 1 0
PM Bytes Added Cycle Cycle for Hold
Words per Waitstates for Internal Offs
Word per Byte Transfer
RD/WR
++ +
Hold offs for DMA transfers are defined in the section “DMA Cycle
Stealing, DMA Hold Offs, and
IACK
Acknowledge” at the end of this
chapter.
11.2.2 BDMA Control Registers
A set of memory-mapped registers are used to setup and control transfers
through the BDMA port. Figures 11.2 through 11.6 show these registers.
The BDMA Internal Address Register (BIAD) lets you set the 14-bit
internal memory starting address for a BDMA transfer. The BDMA
External Address Register (BEAD) lets you set the 14-bit external memory
starting address for a BDMA transfer.
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