8 Analog Interface
8 – 2
Two ADSP-21msp58/59 interrupts are dedicated to the ADC and DAC
converters. One interrupt is used for the ADC and the other interrupt
is used for the DAC. Interrupts occur at the sample rate or when the
autobuffer transfer is complete.
A block diagram of the analog interface is shown in Figure 8.1, and pin
definitions are given in Table 8.1.
PROCESSOR
INTERFACE
DIFFERENTIAL
OUTPUT AMP
1 16 16
ANALOG
SIGMA-DELTA
MODULATOR
1.0
MHz
ANTI-ALIASING
DECIMATION
FILTER
HIGH-PASS
DIGITAL
FILTER
8.0
kHz
8.0
kHz
16-BIT SIGMA-DELTA ADC
16
DIGITAL
HIGH-PASS
FILTER 8.0
kHz
VOUT
P
VOUT
N
1
16 16
ANALOG
SMOOTHING
FILTER
ANTI-IMAGING
INTERPOLATION
1.0
MHz
1.0
MHz
8.0
kHz
16-BIT SIGMA-DELTA DAC
FILTER
DAC
PGA
16
VOLTAGE
REFERENCE
V
REF
REF FILTER
BUF
VIN
NORM
MUX
VIN
AUX
DECOUPLE
ADC
PGA
DIGITAL
SIGMA-DELTA
MODULATOR
Figure 8.1 Analog Interface Block Diagram (ADSP-21msp58/59)
8.2 A/D CONVERSION
The A/D conversion circuitry of the ADSP-21msp58/59’s analog
interface consists of an input multiplexer, a programmable gain
amplifier (PGA), and a sigma-delta analog-to-digital converter (ADC).
8.2.1 Analog Input
The analog input is internally biased by an on-chip voltage reference to
allow operation of the ADSP-21msp58/59 with a single +5V power
supply. The analog inputs should be ac-coupled.
An analog multiplexer selects either the NORM or AUX input. The
input multiplexer is configured by bit 1 (IMS) of the
ADSP-21msp58/59’s analog control register (which is memory-
mapped at address 0x3FEE in data memory). The multiplexer setting
should not be changed while an input signal is being processed.
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