Analog Devices adsp-2100

Contents
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2.2.7 Division ........................................................................................ 2–9
2.2.8 ALU Status.................................................................................. 2–13
2.3 MULTIPLIER/ACCUMULATOR (MAC) ................................... 2–13
2.3.1 MAC Block Diagram Discussion ............................................. 2–13
2.3.2 MAC Operations........................................................................ 2–16
2.3.2.1 Standard Functions.............................................................. 2–16
2.3.2.2 Input Formats ....................................................................... 2–18
2.3.2.3 MAC Input/Output Registers ........................................... 2–18
2.3.2.4 MR Register Operation ....................................................... 2–18
2.3.2.5 MAC Overflow And Saturation ........................................ 2–19
2.3.2.6 Rounding Mode ................................................................... 2–20
2.3.2.7 Biased Rounding (ADSP-217x/218x/21msp5x) ............. 2–21
2.4 BARREL SHIFTER ........................................................................... 2–22
2.4.1 Shifter Block Diagram Discussion ........................................... 2–22
2.4.2 Shifter Operations...................................................................... 2–28
2.4.2.1 Shifter Input/Output Registers ......................................... 2–28
2.4.2.2 Derive Block Exponent ....................................................... 2–29
2.4.2.3 Immediate Shifts .................................................................. 2–30
2.4.2.4 Denormalize ......................................................................... 2–31
2.4.2.5 Normalize ............................................................................. 2–33
CHAPTER 3 PROGRAM CONTROL
3.1 OVERVIEW ........................................................................................ 3–1
3.2 PROGRAM SEQUENCER ................................................................ 3–1
3.2.1 Next Address Select Logic.......................................................... 3–3
3.2.2 Program Counter & PC Stack .................................................... 3–4
3.2.3 Loop Counter & Stack ................................................................. 3–4
3.2.4 Loop Comparator & Stack .......................................................... 3–5
3.3 PROGRAM CONTROL INSTRUCTIONS ..................................... 3–8
3.3.1 JUMP Instruction ......................................................................... 3–8
3.3.1.1 Register Indirect JUMPs........................................................ 3–8
3.3.2 CALL Instruction ......................................................................... 3–9
3.3.3 DO UNTIL Loops ........................................................................ 3–9
3.3.4 IDLE Instruction ........................................................................ 3–10
3.3.4.1 Slow IDLE ............................................................................. 3–10
3.4 INTERRUPTS ................................................................................... 3–11
3.4.1 Interrupt Servicing Sequence ................................................... 3–14
3.4.2 Configuring Interrupts.............................................................. 3–14
3.4.2.1 Interrupt Control Register (ICNTL) .................................. 3–15
3.4.2.2 Interrupt Mask Register (IMASK) ..................................... 3–16
3.4.2.3 Global Enable/Disable For Interrupts .............................. 3–17
3.4.2.4 Interrupt Force & Clear Register (IFC) ............................. 3–18
3.4.3 Interrupt Latency ....................................................................... 3–18
3.4.3.1 Timer Interrupt Latency (ADSP-2101/2105/2111/2115)3–19