ARTERY AT32F435ZMT7 - Table of Contents

AT32F435/437 Series Reference Manual
2022.11.11 Page 2 Rev 2.03
Contents
1 System architecture ...................................................................... 43
1.1 System overview .......................................................................... 45
1.1.1 ARM Cortex
TM
-M4F processor ...................................................... 45
1.1.2 BusMatrix ................................................................................... 45
1.1.3 Bit band ...................................................................................... 47
1.1.4 Interrupt and exception vectors .................................................... 49
1.1.5 System Tick (SysTick) ................................................................. 52
1.1.6 Reset ......................................................................................... 53
1.2 List of abbreviations for registers .................................................. 55
1.3 Device characteristics information ................................................. 55
1.3.1 Flash memory size register .......................................................... 55
1.3.2 Device electronic signature .......................................................... 55
2 Memory resources ........................................................................ 56
2.1 Internal memory address map ....................................................... 56
2.2 Flash memory .............................................................................. 56
2.3 SRAM memory ............................................................................. 59
2.4 Peripheral address map................................................................ 59
3 Power control (PWC) ..................................................................... 62
3.1 Introduction ................................................................................. 62
3.2 Main Features ............................................................................. 62
3.3 POR/LVR .................................................................................... 62
3.4 Power voltage monitor (PVM) ........................................................ 63
3.5 Power domain .............................................................................. 63
3.6 Power saving modes .................................................................... 64
3.7 PWC registers ............................................................................. 66
3.7.1 Power control register (PWC_CTRL) ............................................ 67
3.7.2 Power control/status register (PWC_CTRLSTS) ............................ 67
3.7.3 LDO output voltage select register (PWC_LDOOV) ........................ 68
4 Clock and reset manage (CRM) ..................................................... 69