The 8051 Instruction Set
Atmel 8051 Microcontrollers Hardware Manual 1-4
4316B–8051–02/04
The register banks, containing registers R0 through R7, can be accessed by certain
instructions which carry a 3-bit register specification within the opcode of the instruction.
Instructions that access the registers this way are code efficient, since this mode elimi-
nates an address byte. When the instruction is executed, one of the eight registers in the
selected bank is accessed. One of four banks is selected at execution time by the two
bank select bits in the PSW.
1.2.4 Register-specific Instructions
Some instructions are specific to a certain register. For example, some instructions
always operate on the Accumulator, or Data Pointer, etc., so no address byte is needed
to point to it. The opcode does this itself. Instructions that refer to the Accumulator as ‘A’
assemble as accumulator-specific opcodes.
1.2.5 Immediate Constants
The value of a constant can follow the opcode in Program Memory. For example;
MOV A, # 100
loads the Accumulator with the decimal number 100. The same number could be speci-
fied in hex digits as 64H.
1.2.6 Indexed Addressing
Only Program Memory can be accessed with indexed addressing, and it can only be
read. This addressing mode is intended for reading look-up tables in Program Memory.
A 16-bit base register (either DPTR or the Program Counter) points to the base of the
table, and the Accumulator is set up with the table entry number. The address of the
table entry in Program Memory is formed by adding the Accumulator data to the base
pointer.
Another type of indexed addressing is used in the “case jump” instruction. In this case
the destination address of a jump instruction is computed as the sum of the base pointer
and the Accumulator data.
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