ATtiny10/11/12
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Sleep Modes for the ATtiny12
To enter the sleep modes, the SE bit in MCUCR must be set (one) and a SLEEP instruction must be executed. The SM bit
in the MCUCR register selects which sleep mode (Idle or Power-down) will be activated by the SLEEP instruction. If an
enabled interrupt occurs while the MCU is in a sleep mode, the MCU awakes. The CPU is then halted for four cycles, it
executes the interrupt routine, and resumes execution from the instruction following SLEEP. The contents of the register
file and I/O memory are unaltered. If a reset occurs during sleep mode, the MCU wakes up and executes from the Reset
vector.
Idle Mode
When the SM bit is cleared (zero), the SLEEP instruction forces the MCU into the Idle Mode stopping the CPU but allowing
Timer/Counters, Watchdog and the interrupt system to continue operating. This enables the MCU to wake up from external
triggered interrupts as well as internal ones like Timer Overflow interrupt and Watchdog Reset. If wake-up from the Analog
Comparator interrupt is not required, the analog comparator can be powered down by setting the ACD-bit in the Analog
Comparator Control and Status Register – ACSR. This will reduce power consumption in Idle Mode.
Power-down Mode
When the SM bit is set (one), the SLEEP instruction forces the MCU into the Power-down Mode. In this mode, the external
oscillator is stopped, while the external interrupts and the Watchdog (if enabled) continue operating. Only an external reset,
a watchdog reset (if enabled), an external level interrupt, or a pin change interrupt can wake up the MCU.
Note that if a level triggered or pin change interrupt is used for wake-up from Power-down Mode, the changed level must be
held for a time to wake up the MCU. This makes the MCU less sensitive to noise. The wake-up period is equal to the clock-
counting part of the reset period (See Table 9). The MCU will wake up from the power-down if the input has the required
level for two watchdog oscillator cycles. If the wake-up period is shorter than two watchdog oscillator cycles, the MCU will
wake up if the input has the required level for the duration of the wake-up period. If the wake-up condition disappears
before the wake-up period has expired, the MCU will wake up from power-down without executing the corresponding inter-
rupt. The period of the watchdog oscillator is 2.7 µs (nominal) at 3.0V and 25
°C. The frequency of the watchdog oscillator is
voltage dependent as shown in the section “ATtiny11 Typical Characteristics” on page 54.
When waking up from Power-down Mode, there is a delay from the wake-up condition occurs until the wake-up becomes
effective. This allows the clock to restart and become stable after having been stopped. The wake-up period is defined by
the same CKSEL fuses that define the reset time-out period.
ATtiny12 Calibrated Internal RC Oscillator
In ATtiny12, the calibrated internal oscillator provides a fixed 1 MHz (nominal) clock at 5V and 25°C. This clock may be
used as the system clock. See the section “Clock Options” on page 6 for information on how to select this clock as the sys-
tem clock. This oscillator can be calibrated by writing the calibration byte to the OSCCAL register. When this oscillator is
used as the chip clock, the Watchdog Oscillator will still be used for the Watchdog Timer and for the reset time-out.
For
details on how to use the pre-programmed calibration value, see the section “Calibration Byte in ATtiny12” on page 40.
Oscillator Calibration Register – OSCCAL
•
Bits 7..0 - CAL7..0: Oscillator Calibration Value
Writing the calibration byte to this address will trim the internal oscillator to remove process variations from the oscillator
frequency. When OSCCAL is zero, the lowest available frequency is chosen. Writing non-zero values to this register will
increase the frequency of the internal oscillator. Writing $FF to the register gives the highest available frequency. The cali-
brated oscillator is used to time EEPROM access. If EEPROM is written, do not calibrate to more than 10% above the
Bit 76543210
$31 CAL7 CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
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