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Atmel AVR ATtiny15L User Manual

Atmel AVR ATtiny15L
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31
ATtiny15L
1187H–AVR–09/07
Timer/Counter1 Output
Compare RegisterA – OCR1A
The Output Compare Register 1A is an 8-bit read/write register.
The Timer/Counter Output Compare Register 1A contains the data to be continuously
compared with Timer/Counter1. Actions on compare matches are specified in TCCR1. A
compare match occurs only if Timer/Counter1 counts to the OCR1A value. A software
write that sets TCNT1 and OCR1A to the same value does not generate a compare
match.
A compare match will set (one) the Compare Interrupt Flag in the CPU clock cycle fol-
lowing the compare event.
Timer/Counter1 in PWM Mode When the PWM mode is selected, Timer/Counter1 and the Output Compare Register A
(OCR1A) form an 8-bit, free-running and glitch-free PWM with outputs on the
PB1(OC1A) pin. Timer/Counter1 acts as an up-counter, counting up from $00 up to the
value specified in the second Output Compare Register OCR1B, and starting from $00
up again. When the counter value matches the contents of the Output Compare Regis-
ter OCR1A, the PB1(OC1A) pin is set or cleared according to the settings of the
COM1A1/COM1A0 bits in the Timer/Counter1 Control Registers TCCR1. Refer to Table
12 for details.
Note that in PWM mode, writing to the Output Compare OCR1A, the data value is first
transferred to a temporary location. The value is latched into OCR1A when the
Timer/Counter reaches OCR1B. This prevents the occurrence of odd-length PWM
pulses (glitches) in the event of an unsynchronized OCR1A write. See Figure 22 for an
example.
Bit 76543210
$2E MSB LSB OCR1A
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Table 12. Compare Mode Select in PWM Mode
COM1A1 COM1A0 Effect on Compare Pin
0 0 Not connected
0 1 Not connected
10
Cleared on compare match (up-counting) (non-inverted PWM). Set
when TCNT1 = $00.
11
Set on compare match (up-counting) (inverted PWM). Cleared when
TCNT1 = $00.

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Atmel AVR ATtiny15L Specifications

General IconGeneral
Architecture8-bit AVR
Flash Memory1 KB
SRAM64 Bytes
I/O Pins6
ADC Channels4
Temperature Range-40°C to +85°C
Operating Voltage2.7V - 6.0V
Timers1 x 8-bit
Package8-pin PDIP, SOIC

Summary

Features

Non-volatile Program and Data Memories

1K Byte Flash Program Memory and 64 Bytes EEPROM.

Description

Block Diagram

Pin Descriptions

ATtiny15L Architectural Overview

The General Purpose Register File

Details the 32 general purpose working registers and their access.

The ALU - Arithmetic Logic Unit

Explains the Arithmetic Logic Unit's operation and integration.

The Flash Program Memory

Describes the 1K byte Flash memory, its organization and endurance.

Reset and Interrupt Handling

Interrupt Handling

External Interrupt

Pin Change Interrupt

The MCU Control Register – MCUCR

Sleep Modes

Defines Idle, ADC Noise Reduction, and Power-down modes.

Tuneable Internal RC Oscillator

Timer/Counters

The Timer/Counter0 Prescaler

Details prescaler options for Timer/Counter0.

The Timer/Counter1 Prescaler

Details prescaler options for Timer/Counter1.

The 8-bit Timer/Counter0

Explains Timer/Counter0 operation, clock sources, and control.

The 8-bit Timer/Counter1

Describes Timer/Counter1, including PWM capabilities.

The Watchdog Timer

EEPROM Read/Write Access

Preventing EEPROM Corruption

Techniques to avoid data corruption during low voltage or reset.

The Analog Comparator

The Analog-to-Digital Converter, Analog Multiplexer, and Gain Stages

I/O Port B

Memory Programming

Electrical Characteristics

Absolute Maximum Ratings

Specifies limits beyond which damage may occur.

Typical Characteristics

ATtiny15L Register Summary

ATtiny15L Instruction Set Summary

Ordering Information

Packaging Information

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