5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAD NOTE: PEG_ICOMPI and RCOMPO signals
should be shorted and routed with
- max length = 500 mils
- typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with
- max length = 500 mils
- typical impedance = 14.5 mohms
20 mil
VGA SIDE
PEG Compensation Signal
Coffee Lake-S Processor 1/6 ( DMI,FDI,PEG )
CPU HOLD
坢䴚⫼
坢䴚⫼
del,0524 max
PEG_IRCOMP_R
3.3V
VCCIO
THERM_VOLT 29
DMI_RX0_P14
DMI_RX0_N14
DMI_RX1_P14
DMI_RX1_N14
DMI_RX2_P14
DMI_RX2_N14
DMI_RX3_P14
DMI_RX3_N14
DMI_TX0_P 14
DMI_TX0_N 14
DMI_TX1_P 14
DMI_TX1_N 14
DMI_TX2_P 14
DMI_TX2_N 14
DMI_TX3_P 14
DMI_TX3_N 14
Title
Size Document Number Rev
Date: Sheet
of
6-71-N35T0-D01
1.0
[02] Processor 1/6-DMI,FDI,PEG
A3
257Thursday, September 20, 2018
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number Rev
Date: Sheet
of
6-71-N35T0-D01
1.0
[02] Processor 1/6-DMI,FDI,PEG
A3
257Thursday, September 20, 2018
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number Rev
Date: Sheet
of
6-71-N35T0-D01
1.0
[02] Processor 1/6-DMI,FDI,PEG
A3
257Thursday, September 20, 2018
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
H32
C111D111N
M3
M-MARK1
1
H6
MTHU8_0X9_0B8_0D2_8N
2
3
4
5
1
H8
MTH8_0D2_8
3
4
5
2
H31
C111D111N
M1
M-MARK1
1
H22
MTH8_0D2_8
3
4
5
2
M4
M-MARK1
H28
C111D111N
1
H4
MTHU8_0X9_0B8_0D2_8N
2
3
4
5
1
H11
MTH8_0D2_8
3
4
5
2
M7
M-MARK1
H17
H6_0D3_7
1
H9
MTH8_0D2_8
3
4
5
2
H12
H6_3D4_4
M2
M-MARK1
1
H5
MTHU8_0X9_0B8_0D2_8N
2
3
4
5
H15
H8_0B7_5D5_8
RT1
EWTF02-104F4F-N
P/N = 6-17-10400-730
100K_1%_NTC_04
1 2
M5
M-MARK1
1
H29
MTH8_0D2_8
3
4
5
2
H20
H8_0B7_5D5_8
R138
24.9_1%_04
1
H24
MTH8_0D2_8
3
4
5
2
H1
C111D111N
1
H3
MTHU8_0X9_0B8_0D2_8N
2
3
4
5
1
H2
MTH8_0D2_8
3
4
5
2
H18
H8_0B7_5D5_8
C49
*0.1u_10V_X7R_04
H19
H6_0D3_7
U43C
3H993921-4M41-02H
PN = 6-86-25B51-001
lga1151
3 OF 12
PEG_RXN_6
H5
PEG_RXN_5
G4
PEG_TXN_7
H3
PEG_RXP_9
L5
PEG_TXN_8
J2
PEG_TXP_9
K2
PEG_RXN_8
K5
PEG_RXN_9
L4
PEG_RXN_12
P5
PEG_TXN_15
T3
PEG_TXP_15
T2
PEG_TXP_14
R2
PEG_TXN_14
R1
PEG_TXP_13
P2
PEG_TXN_13
P3
PEG_TXP_12
N1
PEG_TXN_12
N2
PEG_TXN_11
M3
PEG_TXP_11
M2
PEG_TXN_9
K3
PEG_TXP_10
L1
PEG_TXN_10
L2
PEG_TXP_8
J1
PEG_TXP_7
H2
PEG_TXP_6
G1
PEG_TXN_6
G2
PEG_TXP_5
F2
PEG_TXN_4
E2
PEG_TXN_5
F3
PEG_TXP_4
E1
PEG_TXP_3
D2
PEG_TXN_3
D3
PEG_TXP_2
C3
PEG_TXN_2
C4
PEG_TXN_1
B5
PEG_TXP_1
B4
PEG_TXN_0
A6
PEG_TXP_0
A5
PEG_RXN_14
T5
PEG_RXN_13
R4
PEG_RXP_12
P6
PEG_RXN_11
N4
PEG_RXP_11
N5
PEG_RXN_10
M5
PEG_RXP_10
M6
PEG_RXP_6
H6
PEG_RXP_5
G5
PEG_RXN_4
F5
PEG_RXP_4
F6
PEG_RXP_3
E5
PEG_RXN_2
D5
PEG_RXP_2
D6
PEG_RXN_1
C6
PEG_RXP_1
C7
PEG_RXN_0
B7
PEG_RXN_3
E4
PEG_RXP_7
J5
PEG_RXN_7
J4
PEG_RXP_8
K6
PEG_RXN_15
U4
PEG_RXP_14
T6
PEG_RXP_15
U5
DMI_RXN_0
Y4
DMI_RXP_0
Y3
DMI_RXN_1
AA5
DMI_RXP_1
AA4
DMI_RXP_2
AB4
DMI_RXN_2
AB3
DMI_RXN_3
AC5
DMI_RXP_3
AC4
DMI_TXP_0
AC2
DMI_TXN_0
AC1
DMI_TXN_1
AD2
DMI_TXP_1
AD3
DMI_TXP_2
AE2
DMI_TXN_2
AE1
DMI_TXP_3
AF2
DMI_TXN_3
AF3
PEG_RXP_13
R5
PEG_RXP_0
B8
PEG_RCOMP
L7
1
H10
MTH8_0D2_8
3
4
5
2
H13
H8_0B7_5D5_8
1
H30
MTH8_0D2_8
3
4
5
2
R506
20K_1%_04
1
H21
MTH8_0D2_8
3
4
5
2
1
H23
MTH8_0D2_8
3
4
5
2
M8
M-MARK1
H14
H6_0D3_7
M6
M-MARK1
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