5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_A1
M_A_A0
M_A_A3
M_A_A4
M_A_A2
M_A_A5
M_A_A6
M_A_A7
M_A_A9
M_A_A10
M_A_A12
M_A_A11
M_A_A8
M_A_A16
M_A_A13
M_A_A14
M_A_A15
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS3
M_A_DQS1
M_A_DQS7
M_A_DQS#7
M_A_DQS#6
M_A_DQS6
M_A_DQS5
M_A_DQS4
M_A_DQS#3
M_A_DQS#1
M_A_DQS#2
M_A_DQS2
M_A_DQS0
M_A_DQS#0
M_A_DQS#5
M_A_DQS#4
DDR_RCOMP_0
M_A_DQ_0_025
M_A_DQ_1_025
M_A_DQ_1_125
M_A_DQ_1_225
M_A_DQ_1_325
M_A_DQ_1_425
M_A_DQ_1_525
M_A_DQ_1_625
M_A_DQ_1_725
M_A_DQ_0_125
M_A_DQ_0_225
M_A_DQ_0_325
M_A_DQ_0_425
M_A_DQ_0_525
M_A_DQ_0_625
M_A_DQ_0_725
M_A_DQ_2_025
M_A_DQ_2_125
M_A_DQ_2_225
M_A_DQ_2_325
M_A_DQ_2_425
M_A_DQ_2_525
M_A_DQ_2_625
M_A_DQ_2_725
M_A_DQ_3_025
M_A_DQ_4_025
M_A_DQ_5_025
M_A_DQ_3_125
M_A_DQ_3_225
M_A_DQ_3_325
M_A_DQ_3_425
M_A_DQ_3_525
M_A_DQ_3_625
M_A_DQ_3_725
M_A_DQ_4_125
M_A_DQ_4_225
M_A_DQ_4_325
M_A_DQ_4_425
M_A_DQ_4_525
M_A_DQ_4_625
M_A_DQ_4_725
M_A_DQ_6_025
M_A_DQ_7_025
M_A_DQ_5_125
M_A_DQ_5_225
M_A_DQ_5_325
M_A_DQ_5_425
M_A_DQ_5_525
M_A_DQ_5_625
M_A_DQ_5_725
M_A_DQ_6_125
M_A_DQ_6_225
M_A_DQ_6_325
M_A_DQ_6_425
M_A_DQ_6_525
M_A_DQ_6_625
M_A_DQ_6_725
M_A_DQ_7_125
M_A_DQ_7_225
M_A_DQ_7_325
M_A_DQ_7_425
M_A_DQ_7_525
M_A_DQ_7_625
M_A_DQ_7_725
M_A_A[16:0] 25
M_A_ODT1 25
M_A_ODT0 25
M_A_DQS#[7:0] 25
M_A_DQS[7:0] 25
M_A_BG1 25
M_A_BG0 25
M_A_BA0 25
M_A_BA1 25
DDR0_A_ALERT# 25
M_A_ACT# 25
DDR0_A_PARITY 25
DDR_VREF_CA 25
DDR_VTT_CTRL 50
CPUDRAMRST# 25,26
M_A_CLK_DDR0 25
M_A_CLK_DDR#0 25
M_A_CLK_DDR#1 25
M_A_CLK_DDR1 25
M_A_CKE0 25
M_A_CKE1 25
M_A_CS#1 25
M_A_CS#0 25
Title
Size Document Number R e v
Date: Sheet
of
6-71-NV400-D02A
D02A
[03] TGL U -B / DDR CHA
A3
361Thursday, August 06, 2020
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number R e v
Date: Sheet
of
6-71-NV400-D02A
D02A
[03] TGL U -B / DDR CHA
A3
361Thursday, August 06, 2020
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number R e v
Date: Sheet
of
6-71-NV400-D02A
D02A
[03] TGL U -B / DDR CHA
A3
361Thursday, August 06, 2020
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL)
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL)
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
U18B
TGL_U_IP_EXT
?
AU50
DDR0_ALERT#
AU49
DDR0_VREF_CA
E52
DDR_VTT_CTL
C49
DDR_RCOMP
BL52
DDR0_BG0/DDR2_CA3/DDR2_CA4/DDR2_CS1
BY50
DDR0_MA5/DDR0_CA5/DDR0_CA6/DDR0_CA0
CF44
DDR0_ODT1/DDR1_CA0/DDR1_CA0/DDR1_CA6
BU52
DDR0_CKE1/DDR2_CA4/DDR2_CA5/DDR2_CA1
CD45
NC/DDR1_CKE0/DDR1_WCK_P/DDR1_WCK_P
BD41
DDR3_DQ1_0/DDR0_DQ7_0/DDR1_DQ3_0
BD45
DDR3_DQ1_5/DDR0_DQ7_5/DDR1_DQ3_5
BH41
DDR3_DQ0_0/DDR0_DQ6_0/DDR1_DQ2_0
BH47
DDR3_DQ0_5/DDR0_DQ6_5/DDR1_DQ2_5
BC49
DDR2_DQ1_0/DDR0_DQ5_0/DDR0_DQ3_0
AY50
DDR2_DQ1_5/DDR0_DQ5_5/DDR0_DQ3_5
BH49
DDR2_DQ0_0/DDR0_DQ4_0/DDR0_DQ2_0
BF50
DDR2_DQ0_5/DDR0_DQ4_5/DDR0_DQ2_5
CK41
DDR1_DQ1_0/DDR0_DQ3_0/DDR1_DQ1_0
CK45
DDR1_DQ1_5/DDR0_DQ3_5/DDR1_DQ1_5
CV41
DDR1_DQ0_0/DDR0_DQ2_0/DDR1_DQ0_0
CT45
DDR1_DQ0_5/DDR0_DQ2_5/DDR1_DQ0_5
CL49
DDR0_DQ1_0/DDR0_DQ1_0/DDR0_DQ1_0
CH50
DDR0_DQ1_5/DDR0_DQ1_5/DDR0_DQ1_5
CU49
DDR0_DQ0_0/DDR0_DQ0_0/DDR0_DQ0_0
CP50
DDR0_DQ0_5/DDR0_DQ0_5/DDR0_DQ0_5
BB42
DDR3_DQ1_3/DDR0_DQ7_3/DDR1_DQ3_3
BH42
DDR3_DQ0_3/DDR0_DQ6_3/DDR1_DQ2_3
BC53
DDR2_DQ1_3/DDR0_DQ5_3/DDR0_DQ3_3
BH53
DDR2_DQ0_3/DDR0_DQ4_3/DDR0_DQ2_3
CK42
DDR1_DQ1_3/DDR0_DQ3_3/DDR1_DQ1_3
CT42
DDR1_DQ0_3/DDR0_DQ2_3/DDR1_DQ0_3
CL53
DDR0_DQ1_3/DDR0_DQ1_3/DDR0_DQ1_3
CU53
DDR0_DQ0_3/DDR0_DQ0_3/DDR0_DQ0_3
BV44
DDR0_BA0/DDR3_CA0/DDR3_CA0/DDR3_CA6
BV47
DDR0_MA2/DDR3_CS0/DDR3_CA2/DDR3_CA2
BT51
DDR0_MA11/NC/DDR2_CS1/DDR2_CA4
CD53
DDR0_MA3/DDR0_CS1/DDR0_CS0/DDR0_CA3
CF42
DDR0_CS1/DDR1_CA1/DDR1_CA1/DDR1_CA5
BD42
DDR3_DQ1_1/DDR0_DQ7_1/DDR1_DQ3_1
BB41
DDR3_DQ1_2/DDR0_DQ7_2/DDR1_DQ3_2
BB47
DDR3_DQ1_6/DDR0_DQ7_6/DDR1_DQ3_6
BD47
DDR3_DQ1_7/DDR0_DQ7_7/DDR1_DQ3_7
BK41
DDR3_DQ0_1/DDR0_DQ6_1/DDR1_DQ2_1
BK42
DDR3_DQ0_2/DDR0_DQ6_2/DDR1_DQ2_2
BK45
DDR3_DQ0_6/DDR0_DQ6_6/DDR1_DQ2_6
BK47
DDR3_DQ0_7/DDR0_DQ6_7/DDR1_DQ2_7
BC50
DDR2_DQ1_1/DDR0_DQ5_1/DDR0_DQ3_1
BC52
DDR2_DQ1_2/DDR0_DQ5_2/DDR0_DQ3_2
AY52
DDR2_DQ1_6/DDR0_DQ5_6/DDR0_DQ3_6
AY53
DDR2_DQ1_7/DDR0_DQ5_7/DDR0_DQ3_7
BH50
DDR2_DQ0_1/DDR0_DQ4_1/DDR0_DQ2_1
BH52
DDR2_DQ0_2/DDR0_DQ4_2/DDR0_DQ2_2
BF52
DDR2_DQ0_6/DDR0_DQ4_6/DDR0_DQ2_6
BF53
DDR2_DQ0_7/DDR0_DQ4_7/DDR0_DQ2_7
CM41
DDR1_DQ1_1/DDR0_DQ3_1/DDR1_DQ1_1
CM42
DDR1_DQ1_2/DDR0_DQ3_2/DDR1_DQ1_2
CM47
DDR1_DQ1_6/DDR0_DQ3_6/DDR1_DQ1_6
CK47
DDR1_DQ1_7/DDR0_DQ3_7/DDR1_DQ1_7
CT41
DDR1_DQ0_1/DDR0_DQ2_1/DDR1_DQ0_1
CV42
DDR1_DQ0_2/DDR0_DQ2_2/DDR1_DQ0_2
CV47
DDR1_DQ0_6/DDR0_DQ2_6/DDR1_DQ0_6
CT47
DDR1_DQ0_7/DDR0_DQ2_7/DDR1_DQ0_7
CL50
DDR0_DQ1_1/DDR0_DQ1_1/DDR0_DQ1_1
CL52
DDR0_DQ1_2/DDR0_DQ1_2/DDR0_DQ1_2
CH52
DDR0_DQ1_6/DDR0_DQ1_6/DDR0_DQ1_6
CH53
DDR0_DQ1_7/DDR0_DQ1_7/DDR0_DQ1_7
CU50
DDR0_DQ0_1/DDR0_DQ0_1/DDR0_DQ0_1
CU52
DDR0_DQ0_2/DDR0_DQ0_2/DDR0_DQ0_2
CP52
DDR0_DQ0_6/DDR0_DQ0_6/DDR0_DQ0_6
CP53
DDR0_DQ0_7/DDR0_DQ0_7/DDR0_DQ0_7
CB42
DDR0_BA1/DDR1_CA5/DDR1_CA6/DDR1_CA0
BV41
DDR0_MA0/NC/DDR3_CS1/DDR3_CA4
BY53
DDR0_MA8/DDR0_CA2/DDR0_CA3/DDR0_CS0
BT45
NC/DDR3_CKE0/DDR3_WCK_P/DDR3_WCK_P
BV45
DDR0_PAR/DDR3_CS1/DDR3_CS0/DDR3_CA3
BP44
NC/DDR3_CA2/DDR3_CA3/DDR3_CS0
BP45
NC/DDR3_CA3/DDR3_CA4/DDR3_CS1
BU50
DDR0_MA9/DDR2_CA0/DDR2_CA0/DDR2_CA6
CF41
DDR0_MA13/DDR1_CS1/DDR1_CS0/DDR1_CA3
BP42
NC/DDR3_CA4/DDR3_CA5/DDR3_CA1
BP47
NC/DDR3_CA5/DDR3_CA6/DDR3_CA0
BN51
NC/DDR2_CKE0/DDR2_WCK_P/DDR2_WCK_P
BV42
DDR0_MA10/DDR3_CA1/DDR3_CA1/DDR3_CA5
CB44
DDR0_MA15/DDR1_CA3/DDR1_CA4/DDR1_CS1
CR51
DDR0_DQSP_0/DDR0_DQSP_0/DDR0_DQSP_0
CK51
DDR0_DQSP_1/DDR0_DQSP_1/DDR0_DQSP_1
CT44
DDR1_DQSP_0/DDR0_DQSP_2/DDR1_DQSP_0
CK44
DDR1_DQSP_1/DDR0_DQSP_3/DDR1_DQSP_1
BG51
DDR2_DQSP_0/DDR0_DQSP_4/DDR0_DQSP_2
BA51
DDR2_DQSP_1/DDR0_DQSP_5/DDR0_DQSP_3
BK44
DDR3_DQSP_0/DDR0_DQSP_6/DDR1_DQSP_2
BB44
DDR3_DQSP_1/DDR0_DQSP_7/DDR1_DQSP_3
CE50
NC/DDR0_CA1/DDR0_CA1/DDR0_CA5
CE53
NC/DDR0_CA0/DDR0_CA0/DDR0_CA6
BL50
DDR0_CKE0/DDR2_CA5/DDR2_CA6/DDR2_CA0
CA53
NC/DDR0_CKE1/DDR0_WCK_N/DDR0_WCK
CD47
NC/DDR1_CKE1/DDR1_WCK_N/DDR1_WCK
BN53
NC/DDR2_CKE1/DDR2_WCK_N/DDR2_WCK
BT47
NC/DDR3_CKE1/DDR3_WCK_N/DDR3_WCK
BP52
NC/DDR2_CLK_P/DDR2_CLK_P/DDR2_CLK_P
BN50
DDR0_BG1/DDR2_CA2/DDR2_CA3/DDR2_CS0
CE52
DDR0_MA1/NC/DDR0_CS1/DDR0_CA4
CD51
DDR0_MA4/DDR0_CS0/DDR0_CA2/DDR0_CA2
CR50
DDR0_DQSN_0/DDR0_DQSN_0/DDR0_DQSN_0
CK50
DDR0_DQSN_1/DDR0_DQSN_1/DDR0_DQSN_1
CV44
DDR1_DQSN_0/DDR0_DQSN_2/DDR1_DQSN_0
CM44
DDR1_DQSN_1/DDR0_DQSN_3/DDR1_DQSN_1
BG50
DDR2_DQSN_0/DDR0_DQSN_4/DDR0_DQSN_2
BA50
DDR2_DQSN_1/DDR0_DQSN_5/DDR0_DQSN_3
BH44
DDR3_DQSN_0/DDR0_DQSN_6/DDR1_DQSN_2
BD44
DDR3_DQSN_1/DDR0_DQSN_7/DDR1_DQSN_3
BP53
NC/DDR2_CLK_N/DDR2_CLK_N/DDR2_CLK
BT53
DDR0_ACT#/DDR2_CS1/DDR2_CS0/DDR2_CA3
CB47
DDR0_MA16/DDR1_CA4/DDR1_CA5/DDR1_CA1
CA50
DDR0_MA7/DDR0_CA4/DDR0_CA5/DDR0_CA1
BL53
NC/DDR2_CS0/DDR2_CA2/DDR2_CA2
CD42
NC/DDR1_CLK_P/DDR1_CLK_P/DDR1_CLK_P
CF45
DDR0_ODT0/DDR1_CS0/DDR1_CA2/DDR1_CA2
CC53
DDR0_CLK_N0/DDR0_CLK_N/DDR0_CLK_N/DDR0_CLK
BT41
DDR0_CLK_N1/DDR3_CLK_N/DDR3_CLK_N/DDR3_CLK
CA51
NC/DDR0_CKE0/DDR0_WCK_P/DDR0_WCK_P
CC52
DDR0_CLK_P0/DDR0_CLK_P/DDR0_CLK_P/DDR0_CLK_P
BU53
DDR0_MA12/DDR2_CA1/DDR2_CA1/DDR2_CA5
CB45
DDR0_MA14/DDR1_CA2/DDR1_CA3/DDR1_CS0
CF47
DDR0_CS0/NC/DDR1_CS1/DDR1_CA4
CD41
NC/DDR1_CLK_N/DDR1_CLK_N/DDR1_CLK
BT42
DDR0_CLK_P1/DDR3_CLK_P/DDR3_CLK_P/DDR3_CLK_P
BB45
DDR3_DQ1_4/DDR0_DQ7_4/DDR1_DQ3_4
BH45
DDR3_DQ0_4/DDR0_DQ6_4/DDR1_DQ2_4
AY49
DDR2_DQ1_4/DDR0_DQ5_4/DDR0_DQ3_4
BF49
DDR2_DQ0_4/DDR0_DQ4_4/DDR0_DQ2_4
CM45
DDR1_DQ1_4/DDR0_DQ3_4/DDR1_DQ1_4
CV45
DDR1_DQ0_4/DDR0_DQ2_4/DDR1_DQ0_4
CH49
DDR0_DQ1_4/DDR0_DQ1_4/DDR0_DQ1_4
CP49
DDR0_DQ0_4/DDR0_DQ0_4/DDR0_DQ0_4
DV47
DRAM_RESET#
BY52
DDR0_MA6/DDR0_CA3/DDR0_CA4/DDR0_CS1
R175
100_1%_04
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