5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS7
M_B_DQS1
M_B_DQS#6
M_B_DQS6
M_B_DQS5
M_B_DQS4
M_B_DQS3
M_B_DQS#2
M_B_DQS2
M_B_DQS0
M_B_DQS#7
M_B_DQS#5
M_B_DQS#4
M_B_DQS#3
M_B_DQS#1
M_B_DQS#0
M_B_A2
M_B_A4
M_B_A3
M_B_A0
M_B_A1
M_B_A5
M_B_A10
M_B_A9
M_B_A7
M_B_A6
M_B_A16
M_B_A8
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQ_0_026
M_B_DQ_1_026
M_B_DQ_1_126
M_B_DQ_1_226
M_B_DQ_1_326
M_B_DQ_1_426
M_B_DQ_1_526
M_B_DQ_1_626
M_B_DQ_1_726
M_B_DQ_0_126
M_B_DQ_0_226
M_B_DQ_0_326
M_B_DQ_0_426
M_B_DQ_0_526
M_B_DQ_0_626
M_B_DQ_0_726
M_B_DQ_2_026
M_B_DQ_2_126
M_B_DQ_2_226
M_B_DQ_2_326
M_B_DQ_2_426
M_B_DQ_2_526
M_B_DQ_2_626
M_B_DQ_2_726
M_B_DQ_3_026
M_B_DQ_4_026
M_B_DQ_5_026
M_B_DQ_3_126
M_B_DQ_3_226
M_B_DQ_3_326
M_B_DQ_3_426
M_B_DQ_3_526
M_B_DQ_3_626
M_B_DQ_3_726
M_B_DQ_4_126
M_B_DQ_4_226
M_B_DQ_4_326
M_B_DQ_4_426
M_B_DQ_4_526
M_B_DQ_4_626
M_B_DQ_4_726
M_B_DQ_6_026
M_B_DQ_7_026
M_B_DQ_5_126
M_B_DQ_5_226
M_B_DQ_5_326
M_B_DQ_5_426
M_B_DQ_5_526
M_B_DQ_5_626
M_B_DQ_5_726
M_B_DQ_6_126
M_B_DQ_6_226
M_B_DQ_6_326
M_B_DQ_6_426
M_B_DQ_6_526
M_B_DQ_6_626
M_B_DQ_6_726
M_B_DQ_7_126
M_B_DQ_7_226
M_B_DQ_7_326
M_B_DQ_7_426
M_B_DQ_7_526
M_B_DQ_7_626
M_B_DQ_7_726
M_B_DQS#[7:0] 26
M_B_CLK_DDR1 26
M_B_CLK_DDR#1 26
M_B_CLK_DDR#0 26
M_B_CLK_DDR0 26
M_B_CKE1 26
M_B_CKE0 26
M_B_CS#1 26
M_B_CS#0 26
M_B_DQS[7:0] 26
M_B_ODT0 26
M_B_ODT1 26
M_B_A[16:0] 26
DDR1_B_ALERT# 26
DDR1_B_PARITY 26
M_B_BA0 26
M_B_BA1 26
M_B_BG0 26
M_B_BG1 26
M_B_ACT# 26
DDR1_VREF_CA 26
Title
Size Document Number R e v
Date: Sheet
of
6-71-NV400-D02A
D02A
[04] TGL U -C / DDR CHB
A3
461Thursday, August 06, 2020
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number R e v
Date: Sheet
of
6-71-NV400-D02A
D02A
[04] TGL U -C / DDR CHB
A3
461Thursday, August 06, 2020
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number R e v
Date: Sheet
of
6-71-NV400-D02A
D02A
[04] TGL U -C / DDR CHB
A3
461Thursday, August 06, 2020
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL)
LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL)
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip
U18C
TGL_U_IP_EXT
AU52
DDR1_VREF_CA
AA53
DDR1_MA3/DDR4_CS1/DDR4_CS0/DDR4_CA3
AE44
DDR1_ODT1/DDR5_CA0/DDR5_CA0/DDR5_CA6
P52
DDR1_CKE1/DDR6_CA4/DDR6_CA5/DDR6_CA1
AC41
NC/DDR5_CLK_N/DDR5_CLK_N/DDR5_CLK
N38
DDR7_DQ1_0/DDR1_DQ7_0/DDR1_DQ7_0
H36
DDR7_DQ1_5/DDR1_DQ7_5/DDR1_DQ7_5
J47
DDR7_DQ0_0/DDR1_DQ6_0/DDR1_DQ6_0
J41
DDR7_DQ0_5/DDR1_DQ6_5/DDR1_DQ6_5
A40
DDR6_DQ1_0/DDR1_DQ5_0/DDR0_DQ7_0
B38
DDR6_DQ1_5/DDR1_DQ5_5/DDR0_DQ7_5
E47
DDR6_DQ0_0/DDR1_DQ4_0/DDR0_DQ6_0
D43
DDR6_DQ0_5/DDR1_DQ4_5/DDR0_DQ6_5
AL47
DDR5_DQ1_0/DDR1_DQ3_0/DDR1_DQ5_0
AL41
DDR5_DQ1_5/DDR1_DQ3_5/DDR1_DQ5_5
AV47
DDR5_DQ0_0/DDR1_DQ2_0/DDR1_DQ4_0
AR42
DDR5_DQ0_5/DDR1_DQ2_5/DDR1_DQ4_5
AH49
DDR4_DQ1_0/DDR1_DQ1_0/DDR0_DQ5_0
AF50
DDR4_DQ1_5/DDR1_DQ1_5/DDR0_DQ5_5
AP49
DDR4_DQ0_0/DDR1_DQ0_0/DDR0_DQ4_0
AL50
DDR4_DQ0_5/DDR1_DQ0_5/DDR0_DQ4_5
AC52
DDR1_MA1/NC/DDR4_CS1/DDR4_CA4
W51
NC/DDR4_CKE0/DDR4_WCK_P/DDR4_WCK_P
AC47
NC/DDR5_CKE0/DDR5_WCK_P/DDR5_WCK_P
N36
DDR7_DQ1_3/DDR1_DQ7_3/DDR1_DQ7_3
G45
DDR7_DQ0_3/DDR1_DQ6_3/DDR1_DQ6_3
E41
DDR6_DQ1_3/DDR1_DQ5_3/DDR0_DQ7_3
A46
DDR6_DQ0_3/DDR1_DQ4_3/DDR0_DQ6_3
AJ45
DDR5_DQ1_3/DDR1_DQ3_3/DDR1_DQ5_3
AR45
DDR5_DQ0_3/DDR1_DQ2_3/DDR1_DQ4_3
AH53
DDR4_DQ1_3/DDR1_DQ1_3/DDR0_DQ5_3
AP53
DDR4_DQ0_3/DDR1_DQ0_3/DDR0_DQ4_3
R41
DDR1_CLK_P1/DDR7_CLK_P/DDR7_CLK_P/DDR7_CLK_P
N51
DDR1_MA11/NC/DDR6_CS1/DDR6_CA4
J53
NC/DDR6_CS0/DDR6_CA2/DDR6_CA2
K51
NC/DDR6_CKE0/DDR6_WCK_P/DDR6_WCK_P
AC42
NC/DDR5_CLK_P/DDR5_CLK_P/DDR5_CLK_P
L38
DDR7_DQ1_1/DDR1_DQ7_1/DDR1_DQ7_1
L36
DDR7_DQ1_2/DDR1_DQ7_2/DDR1_DQ7_2
G36
DDR7_DQ1_6/DDR1_DQ7_6/DDR1_DQ7_6
G38
DDR7_DQ1_7/DDR1_DQ7_7/DDR1_DQ7_7
G47
DDR7_DQ0_1/DDR1_DQ6_1/DDR1_DQ6_1
J45
DDR7_DQ0_2/DDR1_DQ6_2/DDR1_DQ6_2
G41
DDR7_DQ0_6/DDR1_DQ6_6/DDR1_DQ6_6
G42
DDR7_DQ0_7/DDR1_DQ6_7/DDR1_DQ6_7
B40
DDR6_DQ1_1/DDR1_DQ5_1/DDR0_DQ7_1
D40
DDR6_DQ1_2/DDR1_DQ5_2/DDR0_DQ7_2
D38
DDR6_DQ1_6/DDR1_DQ5_6/DDR0_DQ7_6
E38
DDR6_DQ1_7/DDR1_DQ5_7/DDR0_DQ7_7
D46
DDR6_DQ0_1/DDR1_DQ4_1/DDR0_DQ6_1
B46
DDR6_DQ0_2/DDR1_DQ4_2/DDR0_DQ6_2
B43
DDR6_DQ0_6/DDR1_DQ4_6/DDR0_DQ6_6
A43
DDR6_DQ0_7/DDR1_DQ4_7/DDR0_DQ6_7
AL45
DDR5_DQ1_1/DDR1_DQ3_1/DDR1_DQ5_1
AJ47
DDR5_DQ1_2/DDR1_DQ3_2/DDR1_DQ5_2
AJ42
DDR5_DQ1_6/DDR1_DQ3_6/DDR1_DQ5_6
AJ41
DDR5_DQ1_7/DDR1_DQ3_7/DDR1_DQ5_7
AR47
DDR5_DQ0_1/DDR1_DQ2_1/DDR1_DQ4_1
AV45
DDR5_DQ0_2/DDR1_DQ2_2/DDR1_DQ4_2
AV42
DDR5_DQ0_6/DDR1_DQ2_6/DDR1_DQ4_6
AR41
DDR5_DQ0_7/DDR1_DQ2_7/DDR1_DQ4_7
AH50
DDR4_DQ1_1/DDR1_DQ1_1/DDR0_DQ5_1
AH52
DDR4_DQ1_2/DDR1_DQ1_2/DDR0_DQ5_2
AF52
DDR4_DQ1_6/DDR1_DQ1_6/DDR0_DQ5_6
AF53
DDR4_DQ1_7/DDR1_DQ1_7/DDR0_DQ5_7
AP50
DDR4_DQ0_1/DDR1_DQ0_1/DDR0_DQ4_1
AP52
DDR4_DQ0_2/DDR1_DQ0_2/DDR0_DQ4_2
AL52
DDR4_DQ0_6/DDR1_DQ0_6/DDR0_DQ4_6
AL53
DDR4_DQ0_7/DDR1_DQ0_7/DDR0_DQ4_7
U50
DDR1_MA5/DDR4_CA5/DDR4_CA6/DDR4_CA0
AU53
DDR1_ALERT#
J52
DDR1_BG0/DDR6_CA3/DDR6_CA4/DDR6_CS1
AA51
DDR1_MA4/DDR4_CS0/DDR4_CA2/DDR4_CA2
AE42
DDR1_CS1/DDR5_CA1/DDR4_CA1/DDR4_CA5
Y52
DDR1_CLK_P0/DDR4_CLK_P/DDR4_CLKP/DDR4_CLK_P
AA42
DDR1_BA1/DDR5_CA5/DDR5_CA6/DDR5_CA0
U52
DDR1_MA6/DDR4_CA3/DDR4_CA4/DDR4_CS1
U53
DDR1_MA8/DDR4_CA2/DDR4_CA3/DDR4_CS0
AE41
DDR1_MA13/DDR5_CS1/DDR5_CS0/DDR5_CA3
U42
DDR1_MA10/DDR7_CA1/DDR7_CA1/DDR7_CA5
AA44
DDR1_MA15/DDR5_CA3/DDR5_CA4/DDR5_CS1
AN51
DDR4_DQSP_0/DDR1_DQSP_0/DDR0_DQSP_4
AG51
DDR4_DQSP_1/DDR1_DQSP_1/DDR0_DQSP_5
AV44
DDR5_DQSP_0/DDR1_DQSP_2/DDR1_DQSP_4
AJ44
DDR5_DQSP_1/DDR1_DQSP_3/DDR1_DQSP_5
C45
DDR6_DQSP_0/DDR1_DQSP_4/DDR0_DQSP_6
D39
DDR6_DQSP_1/DDR1_DQSP_5/DDR0_DQSP_7
G44
DDR7_DQSP_0/DDR1_DQSP_6/DDR1_DQSP_6
K36
DDR7_DQSP_1/DDR1_DQSP_7/DDR1_DQSP_7
J50
DDR1_CKE0/DDR6_CA5/DDR6_CA6/DDR6_CA0
W53
NC/DDR4_CKE1/DDR4_WCK_N/DDR4_WCK
AC45
NC/DDR5_CKE1/DDR5_WCK_N/DDR5_WCK
K53
NC/DDR6_CKE1/DDR6_WCK_N/DDR6_WCK
R45
NC/DDR7_CKE1/DDR7_WCK_N/DDR7_WCK
W50
DDR1_MA7/DDR4_CA4/DDR4_CA5/DDR4_CA1
P50
DDR1_MA9/DDR6_CA0/DDR6_CA0/DDR6_CA6
K50
DDR1_BG1/DDR6_CA2/DDR6_CA3/DDR6_CS0
AN50
DDR4_DQSN_0/DDR1_DQSN_0/DDR0_DQSN_4
AG50
DDR4_DQSN_1/DDR1_DQSN_1/DDR0_DQSN_5
AR44
DDR5_DQSN_0/DDR1_DQSN_2/DDR1_DQSN_4
AL44
DDR5_DQSN_1/DDR1_DQSN_3/DDR1_DQSN_5
D45
DDR6_DQSN_0/DDR1_DQSN_4/DDR0_DQSN_6
C39
DDR6_DQSN_1/DDR1_DQSN_5/DDR0_DQSN_7
J44
DDR7_DQSN_0/DDR1_DQSN_6/DDR1_DQSN_6
K38
DDR7_DQSN_1/DDR1_DQSN_7/DDR1_DQSN_7
N53
DDR1_ACT#/DDR6_CS1/DDR6_CS0/DDR6_CA3
AA47
DDR1_MA16/DDR5_CA4/DDR5_CA5/DDR5_CA1
U45
DDR1_PAR/DDR7_CS1/DDR7_CS0/DDR7_CA3
AE45
DDR1_ODT0/DDR5_CS0/DDR5_CA2/DDR5_CA2
AC53
NC/DDR4_CA0/DDR4_CA0/DDR4_CA6
AC50
NC/DDR4_CA1/DDR4_CA1/DDR4_CA5
N47
NC/DDR7_CA2/DDR7_CA3/DDR7_CS0
N44
NC/DDR7_CA3/DDR7_CA4/DDR7_CS1
R47
NC/DDR7_CKE0/DDR7_WCK_P/DDR7_WCK_P
Y53
DDR1_CLK_N0/DDR4_CLK_N/DDR4_CLK_N/DDR4_CLK
M53
NC/DDR6_CLK_N/DDR6_CLK_N/DDR6_CLK
R42
DDR1_CLK_N1/DDR7_CLK_N/DDR7_CLK_N/DDR7_CLK
AE47
DDR1_CS0/NC/DDR4_CS1/DDR4_CA4
M52
NC/DDR6_CLK_P/DDR6_CLK_P/DDR6_CLK_P
U44
DDR1_BA0/DDR7_CA0/DDR7_CA0/DDR7_CA6
U47
DDR1_MA2/DDR7_CS0/DDR7_CA2/DDR7_CA2
P53
DDR1_MA12/DDR6_CA1/DDR6_CA1/DDR6_CA5
AA45
DDR1_MA14/DDR5_CA2/DDR5_CA3/DDR5_CS0
H38
DDR7_DQ1_4/DDR1_DQ7_4/DDR1_DQ7_4
J42
DDR7_DQ0_4/DDR1_DQ6_4/DDR1_DQ6_4
A38
DDR6_DQ1_4/DDR1_DQ5_4/DDR0_DQ7_4
E44
DDR6_DQ0_4/DDR1_DQ4_4/DDR0_DQ6_4
AL42
DDR5_DQ1_4/DDR1_DQ3_4/DDR1_DQ5_4
AV41
DDR5_DQ0_4/DDR1_DQ2_4/DDR1_DQ4_4
AF49
DDR4_DQ1_4/DDR1_DQ1_4/DDR0_DQ5_4
AL49
DDR4_DQ0_4/DDR1_DQ0_4/DDR0_DQ4_4
U41
DDR1_MA0/NC/DDR7_CS1/DDR7_CA4
N45
NC/DDR7_CA4/DDR7_CA5/DDR7_CA1
N42
NC/DDR7_CA5/DDR7_CA6/DDR7_CA0
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