EasyManua.ls Logo

Clevo NV40MZ - Page 58

Clevo NV40MZ
106 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Sheet 13 of 61
Processor 12/12
Schematic Diagrams
B - 14 Processor 12/12
B.Schematic Diagrams
Processor 12/12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Form power
Form EC
CAD Note: Capacitor need to be placed
close to buffer output pin
LENGTH <500MILS
PU/PD for JTAG signals
CFG[0]: Stall reset sequence after
Ʉ
PCU PLL
lock until de-asserted:
1 = (Default) Normal Operation; No
stall.
0 = Stall.
CFG[1]: Reserved configuration lane.
Ʉ
CFG[2]: PCI Express* Static x16 Lane
Ʉ
Numbering Reversal.
1 = Normal operation
0 = Lane numbers reversed.
CFG[3]: Reserved configuration lane.
Ʉ
CFG[4]: eDP enable:
Ʉ
1 = Disabled.
0 = Enabled.
CFG[6:5]: PCI Express* Bifurcation
Ʉ
00 = 1 x8, 2 x4 PCI Express*
01 = reserved
10 = 2 x8 PCI Express*
11 = 1 x16 PCI Express*
CFG[7]: PEG Training:
Ʉ
1 = (default) PEG Train immediately
following RESET# de assertion.
0 = PEG Wait for BIOS for training.
CFG[19:8]: Reserved configuration
Ʉ
lanes.
1125
AC_IN# LOW --> H_PROCHOT_EC =HIGH
AC_IN# HIGH --> H_PROCHOT_EC =LOW DELAY 3SEC CHANGE OUTPUT HIGH
H_CATERR#
H_PROCHOT#_D
H_PE CI_ISO
H_PROCHOT#
THRMTRIP_R_N
H_PROCHOT#
PCH_OPI_RCOMP
CPU_POPIRCOMP
GPP_B3_R
XDP_TRST#
XDP_TCLK
XDP_TDI
XDP_TDO
XDP_TMS
PCH_JTAG_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_TCLK
XDP_PREQ#
XDP_PRDY#
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TCLK
XDP_TCLK
XDP_TRST#
CNVI_WAKE#
SKTOCC#
CFG_RCOMP
MBIAS_RCOMP
CFG0
CFG4
CFG6
CFG5
CFG3
CFG7
SCI#
SMI#
SCI#
SMI#
CPU_EAR
CPU_EAR
CPU_EAR
CFG14
GPP_H0_RTD3
GPIO_LANRTD3GPP_F10
GPIO_LANRTD3
GPP_F10
GPP_H1GPP_H0_RTD3 GPP_H2
GPP_H2
GPP_H1
GPIO_LAN_EN
VCCST
VCCST
VCCSTG
VCCSTG
3.3VA
3.3VS
VCCSTG_OUT_LGC
3.3VA3.3VA3.3VA3.3VA 3.3VA
3.3VA
3.3VA
H_PECI33
H_PROCHOT_EC33
H_PROCHOT#44
GPP_B341
CNVI_WAKE#35
SMI#33
GPP_H0_RTD330
GPIO_LANRTD3 34
GPIO_LAN_EN 34
VRALERT#_PD11
PROCHOT_PD40
AC_IN#33,52
Title
Size Document Number R e v
Date: Sheet
of
6-71-NV400-D02A
D02A
[13] TGL U -S,U,T / CFG
A3
13 61Thursday, August 06, 2020
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number R e v
Date: Sheet
of
6-71-NV400-D02A
D02A
[13] TGL U -S,U,T / CFG
A3
13 61Thursday, August 06, 2020
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number R e v
Date: Sheet
of
6-71-NV400-D02A
D02A
[13] TGL U -S,U,T / CFG
A3
13 61Thursday, August 06, 2020
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
R27
*4.7K_04
R65 *1K_04
S
D
G
Q4B
SM2004KDWH
5
34
R581 1K_04
R588 *1K_04
U18S
TGL_U_IP_EXT
C53
RSVD_23
DF49
RSVD_22
DF50
RSVD_21
DF52
RSVD_20
U35
RSVD_27
A6
IST_TP_1
AP9
RSVD_30
CF39
RSVD_26
A4
IST_TP_0
A52
RSVD_31
E53
RSVD_25
CB39
RSVD_32
T35
RSVD_24
DU53
PCH_IST_TP_0
DT52
PCH_IST_TP_1
B53
RSVD_29
DF53
RSVD_19
F53
RSVD_28
V21
RSVD_TP_29
BF12
RSVD_TP_28
D4
RSVD_TP_27
CY15
RSVD_TP_26
CY30
RSVD_TP_25
CY28
RSVD_TP_39
U38
RSVD_TP_38
W38
RSVD_TP_37
AY12
RSVD_TP_36
W37
RSVD_TP_35
BB12
RSVD_TP_34
U21
RSVD_TP_33
CD39
RSVD_TP_32
U37
RSVD_TP_31
W20
RSVD_TP_30
R584
*1K_04
R129
*4.7K_04
R631
*4.7K_04
R568 10K_04
R48 *1K_04
R66 *14mil_02
S
D
G
Q4A
SM2004KDWH
2
61
D55 RB751S-40G
AC
R583 49.9_1%_04
R28
*4.7K_04
R103 *1K_04
T39 PCB Footprint = TC32-75
R195 0_04
R177 0_04
R39 10K_04
R573 2.2K_1%_04
R210 0_04
R595 100_04
T4
U18U
TGL_U_IP_EXT
BK9
PECI
CB9
PCH_OPIRCOMP
DF4
DBG_PMODE
D8
PCH_JTAGX
K4
PROC_TRST#
DF31
GPP_H2
CT39
PROC_POPIRCOMP
DV32
GPP_H1
DU5
GPP_E3/CPU_GP0
DF8
GPP_E7/CPU_GP1
DW32
GPP_H0
D11
PROC_PRDY#
DT14
GPP_F10
A9
PCH_TMS
B6
PROC_TCK
D12
PROC_TDO
M7
CATERR#
A7
PCH_TCK
B12
PCH_TDI
M5
THRMTRIP#
G1
EAR_N_TEST_NCTF
DB41
GPP_B3/CPU_GP2
DB42
GPP_B4/CPU_GP3
E2
PROCHOT#
H4
PCH_TRST#
E12
PCH_TDO
C11
PROC_PREQ#
CW12
TP_1
DT15
GPP_F7
DJ27
GPP_H19/TIME_SYNC0
CM39
TP_2
B9
PROC_TMS
DR15
GPP_F9
A12
PROC_TDI
T2
R570 *1K_04
T7 PCB Footprint = TC32-75
R49 1K_04
R580 499_1%_04
R61 1K_04
R577 *51_04
C628
*47p_25V_NPO_02
R592 *51_04
R848 200K_04
R176 10K_04
R73
1K_04
T6
R591 51_04
R598 51_04
U18T
TGL_U_IP_EXT
DV6
RSVD_15
C1
RSVD_TP_9
Y2
BPM#_0
E6
CFG_4
DV51
VSS_1
AK9
RSVD_12
AB4
BPM#_1
H9
CFG_5
AH9
RSVD_13
K8
CFG_6
DD13
RSVD_10
H7
CFG_7
DF13
RSVD_11
U17
CFG_17
E7
CFG_0
H11
CFG_16
D9
CFG_1
B5
CFG_RCOMP
E9
CFG_2
T15
CFG_15
DV53
TP_4
H5
CFG_3
V17
CFG_14
U15
CFG_13
AR2
TCP0_MBIAS_RCOMP
B3
RSVD_7
K11
CFG_12
D52
SKTOCC#
AL10
RSVD_TP_2
A3
RSVD_6
K12
CFG_11
V35
RSVD_18
AM12
RSVD_TP_3
K9
CFG_10
AH12
RSVD_TP_4
K7
CFG_8
E1
RSVD_TP_19
DV2
RSVD_TP_18
DW2
RSVD_TP_17
DT2
RSVD_TP_16
DU1
RSVD_TP_15
DW3
RSVD_TP_14
DV4
RSVD_TP_13
CU40
RSVD_TP_12
CP39
RSVD_TP_11
D2
RSVD_TP_10
AJ10
RSVD_TP_5
T17
CFG_9
DW52
TP_3
DW5
RSVD_TP_24
DR53
RSVD_TP_23
DR2
RSVD_TP_22
DR1
RSVD_TP_21
AB2
RSVD_16
F1
RSVD_TP_20
AR1
RSVD_TP_6
W34
RSVD_17
A51
RSVD_TP_7
BM12
RSVD_9
M4
BPM#_2
DW6
RSVD_14
B51
RSVD_TP_8
BN10
RSVD_8
Y1
BPM#_3
R53 49.9_1%_04
R632
*4.7K_04
D7
RB751S-40G
AC
R145 49.9_1%_04
R74 49.9_1%_04
R578 *1K_04
R209
100K_04
R587 51_04

Table of Contents

Related product manuals