5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTC Wake UP
BIOS ROM 4MB
ME+ BIOS ROM 8MB
SPI_* = 0.5"~2"
DESIGN NOTE:
ESPI FLASH SHARING MODE
0: MASTER ATTACHED FLASH SHARING
1: SLAVE ATTACEHD FLASH SHARING
PCH HAS INT ERNAL WEAK PD
Lynx Point - M (SPI,GPP)
DESIGN NOTE:
BOOT HALT ENABLED IF LOW
PCH HAS INTERNAL WEAK PU
DESIGN NOTE:
JTAG ODT IS DISABLED IF LOW
PCH HAS INTERNAL WEAK PU
DESIGN NOTE:
SMB RESUM E/M AIN LOGIC
BIOS DEBUG PORT
DESIGN NOTE:
TOUCH PANEL
Co_Lay
婳 㬋 側 䔲
DESIGN NOTE:
BOOT SELECT STRAP
IF SAMPLED HIGH, LPC IS SELECTED
ELSE SPI PCH HAS INTERNAL WEAK PD.
DESIGN NOTE:
MB det
H:P77 L:P75
DESIGN NOTE:
DM2/DM3 det
H:DM3 L:DM 2
䄏⍇ỵ
LAYOUT
⬴
,
㉱⬴ 㷔溆 ⼴
ℵ⇒㌱
J_80DEBUG2
BOARD ID RB
10KV1.0 X
RA
P750DM10KXV1.0
10K
10K
P775DM
PROJECT NAME
V1.0
RA
RB
V1.0
X
X
RC RD
RC
RD
DM3
DM2
DEFAULT
PLACE CLOSE TO PIN
SSPI_SI
SSPI_SO
SSPI_SCLK
SSPI_WP#0 SSPI_CS0#
SSPI_HOLD#0
PLT_RST#
GPP_H_12
TCH_PNL_INTR_N
SPI_MOSI
SPI_MISO
TBCIO_PLUG_EVENT
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH
UART2_RXD
UART2_TXD
SPI_SCLK_R
SPI_MOSI
SPI_MISO
SPI_CS_0#
SPI1_TCHPNL_IO2
PCH_SPI_IO3SSPI_HOLD#0
SSPI_WP#0
SPI_CS_2#
PCH_SPI_IO2
TP_GPP_H_11_SML2CLK
GPP_H_12
HOME_BTN_PCH
TP_GPP_H_18
M.2_WIGIG_RST_R
M.2_WIGIG_WAKE_R_N
TBT_FRC_PWR
TBCIO_PLUG_EVENT
EXTTS_SNI_DRV0_PCH
TCH_PNL_INTR_N
EXTTS_SNI_DRV1_PCH
SSPI_CS0#
SSPI_SI
SSPI_SO
SSPI_SCLK
SPI_CS_0#
SPI_CS_1#
SPI_MOSI
SPI_SCLK_R
SPI_MISO
PME#
PLT_RST#
SM_INTRUDER#
LPSS_GSPI1_MOSI
UART2_TXD
UART2_RXD
LPSS_GSPI1_MOSI
PCH_SPI_IO3
GPP_A23
GPP_A22
GPP_A22 GPP_A23
UART2_RXD
VDD3
UART2_TXD
UART2_RXD
GND
SSPI_CS0# UART2_TXD
GSYNC_ID
3.3V_SPI
3.3VS
3.3VA
3.3VS
V3P3A_V1P8A_PCH_SPI
V3P3A_V1P8A_PCH_SPI
3.3VA
5VS
3.3VA
3.3VA
3.3VS
3.3VS
VDD3
3.3VA
3.3VS
VCCPGPPA
RTCVCC
3.3VA
3.3VA 3.3VA
VDD3
VDD3
3.3V_SPI
VDD3
3.3VS
BUF_PLT_RST# 25,26,30,31,35,37,41
VDD315,17,18,20,21,25,30,31,33,35,43,45,46,47,51,52
3.3VS7,8,9,10,11,14,15,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
5VS11,14,15,27,29,30,32,34,44,46,47
V3P3A_V1P8A_PCH_SPI21
RTCVCC18,21
PM_PCH_PWROK17,18,21,30
SMB_DATA_MAIN 7,8,9,10
SMB_CLK_MAIN 7,8,9,10
SMB_DATA 18,28,34,44
SMB_CLK 18,28,34,44
VCCPGPPA21
HSPI_SCLK30
HSPI_CE#30
HSPI_MSO30
HSPI_MSI30
TBT_FRC_PWR 37
3.3VA3,17,18,20,21,46
TBTA_MRESET30,39,40
PLT_RST# 15,42
LPSS_GSPI0_MISO25
LPSS_GSPI0_MOSI19
SB_BLON 11
TBTA_ACE_GPIO0 39,40
TBTA_ACE_GPIO3 39,40
TBTA_ACE_GPIO2 39,40
TPM_DET# 42
PCM_INT_186328
I2C1_SCL31
I2C1_SDA31
GSYNC_ID 11
PS8330B_PCH 36
TBTA_HRESET30,39,40
TBCIO_PLUG_EVENT 37
Title
Size Document Number R ev
Date: Sheet
of
6-71-P7750-D32
2.0
[16] Lynx 1/7-SPI/GPP
A3
16 70Thursday, July 14, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number R ev
Date: Sheet
of
6-71-P7750-D32
2.0
[16] Lynx 1/7-SPI/GPP
A3
16 70Thursday, July 14, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number R ev
Date: Sheet
of
6-71-P7750-D32
2.0
[16] Lynx 1/7-SPI/GPP
A3
16 70Thursday, July 14, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
C626 *1u_6.3V_X5R_04
R704
*20K_04
R714 1K_1%_04
Q56
2SK3018S3
G
DS
R670 *10K_04
R692 33_04
R700 1K_04
R641
1K_04
R215 10K_04
R667 *1K_04
R185 33_04
U16
GD25B64CSIGR
CE#
1
SO
2
WP#
3
VSS
4
SI
5
SCK
6
HOLD#
7
VDD
8
R642 1K_04
C614 *1u_6.3V_X5R_04
S
D
G
Q55A
MTDK5S6R
2
61
R697 *10mil_short
R216 1M_04
R82
100K_04
R194 *20mil_04
R657 1K_04
S
D
G
Q55B
MTDK5S6R
5
34
SKL_PCH_H
REV = 1.3
1 OF 12
?
?U17A
Z170 MP
INTRUDER#
BE11
GPP_H10/SML2CLK
BD34
GPP_H11/SML2DATA
AW35
GPP_H12/SML2ALERT#
BD35
GPP_H13/SML3CLK
BC35
GPP_H14/SML3DATA
BA35
GPP_H15/SML3ALERT#
BB36
GPP_H16/SML4CLK
BD39
GPP_H17/SML4DATA
BE34
GPP_H18/SML4ALERT#
BC36
GPP_B4/CPU_GP3
BD24
GPP_B3/CPU_GP2
BC23
GPP_E7/CPU_GP1
AE44
GPP_E3/CPU_GP0
AF41
GPP_G15/GSXSRESET#
R41
GPP_G14/GSXDIN
R42
GPP_G13/GSXSLOAD
R36
GPP_G12/GSXDOUT
R39
GPP_G16/GSXCLK
P43
GPP_B13/PLTRST#
BB27
GPP_D21
AG44
GPP_D22
AH43
GPP_D3
AN41
GPP_D0
AL39
SPI0_CS2#
AT31
SPI0_IO3
BD30
SPI0_IO2
BC29
SPI0_CLK
BC31
SPI0_CS0#
BD31
RSVD
AE17
RSVD
AF17
RSVD
AG14
TP5
AR19
TP4
AN17
SPI0_MOSI
BB29
SPI0_MISO
BE30
SPI0_CS1#
AW31
GPP_D1
AN36
GPP_D2
AN38
RSVD
AG15
GPP_A11/PME#
BD17
R206 8.2K_04
C625 *1u_6.3V_X5R_04
R694 *1K_1%_04
R218 *10K_04
R679 8.2K_04
PJ7 OPEN-1mm
12
R702
*4.7K_04
R191
*4.7K_04
J_80DEBUG2
*85204-04001
1
2
3
4
R693 33_04
R658 1K_04
R190
*4.7K_04
R698 *10mil_short
C656
0.1u_10V_X7R_04
R868 10K_04
R193 *20mil_04
R712
*10K_04
R695
*1K_04
R699 *10mil_short
R919 *0_04
R711
10K_04
C640 0.1u_10V_X7R_04
R179
*4.7K_04
R188 *20mil_04
U47
U74AHC1G08G-AL5-R
1
2
5
4
3
R869 10K_04
R920 *0_04
R716 33_04
R643
1K_04
R696
*20K_04
R637 1K_04
R186
*20K_04
R184 *20mil_04
R710
*10K_04
R686 *10mil_short
R162 10K_04
R196 33_04
C615 *1u_6.3V_X5R_04
R709
10K_04
R703 *10K_04
SKL_PCH_H
?
?
11 OF 12
REV = 1.3
U17K
Z170 MP
GPP_B22/GSPI1_MOSI
AT29
GPP_B21/GSPI1_MISO
AR29
GPP_B20/GSPI1_CLK
AV29
GPP_B19/GSPI1_CS#
BC27
GPP_B18/GSPI0_MOSI
BD28
GPP_B17/GSPI0_MISO
BD27
GPP_B16/GSPI0_CLK
AW27
GPP_B15/GSPI0_CS#
AR24
GPP_C9/UART0_TXD
AV44
GPP_C8/UART0_RXD
BA41
GPP_C11/UART0_CTS#
AU44
GPP_C10/UART0_RTS#
AV43
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AU41
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AT44
GPP_C13/UART1_TXD/ISH_UART1_TXD
AT43
GPP_C12/UART1_RXD/ISH_UART1_RXD
AU43
GPP_C23/UART2_CTS#
AN43
GPP_C22/UART2_RTS#
AN44
GPP_C21/UART2_TXD
AR39
GPP_C20/UART2_RXD
AR45
GPP_C19/I2C1_SCL
AR41
GPP_C18/I2C1_SDA
AR44
GPP_C17/I2C0_SCL
AR38
GPP_C16/I2C0_SDA
AT42
GPP_D4/ISH_I2C2_SDA/I2C3_SDA
AM44
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
AJ44
GPP_D9
AL44
GPP_D10
AL36
GPP_D11
AL35
GPP_D12
AJ39
GPP_D16/ISH_UART0_CTS#
AJ43
GPP_D15/ISH_UART0_RTS#
AL43
GPP_D14/ISH_UART0_TXD
AK44
GPP_D13/ISH_UART0_RXD
AK45
GPP_H20/ISH_I2C0_SCL
BC38
GPP_H19/ISH_I2C0_SDA
BB38
GPP_H22/ISH_I2C1_SCL
BD38
GPP_H21/ISH_I2C1_SDA
BE39
GPP_A23/ISH_GP5
BC22
GPP_A22/ISH_GP4
BD18
GPP_A21/ISH_GP3
BE21
GPP_A20/ISH_GP2
BD22
GPP_A19/ISH_GP1
BD21
GPP_A18/ISH_GP0
BB22
GPP_A17/ISH_GP7
BC19
R189
100K_04
Q57
2SK3018S3
G
DS
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