Cypress MB95710M Series - Page 103

MB95710M Series
MB95770M Series
Document Number: 002-09307 Rev. *D Page 102 of 172
19.3.3 Port 2 registers
• Port 2 register functions
*: If the pin is an N-ch open drain pin, the pin state becomes Hi-Z.
• Correspondence between registers and pins for port 2
19.3.4 Port 2 operations
• Operation as an output port
• A pin becomes an output port if the bit in the DDR2 register corresponding to that pin is set to “1”.
• For a pin shared with other peripheral functions, disable the output of such peripheral functions.
• When a pin is used as an output port, it outputs the value of the PDR2 register to external pins.
• If data is written to the PDR2 register, the value is stored in the output latch and is output to the pin set as an output
port as it is.
• Reading the PDR2 register returns the PDR2 register value.
• Operation as an input port
• A pin becomes an input port if the bit in the DDR2 register corresponding to that pin is set to “0”.
• For a pin shared with other peripheral functions, disable the output of such peripheral functions.
• If data is written to the PDR2 register, the value is stored in the output latch but is not output to the pin set as an
input port.
• Reading the PDR2 register returns the pin value. However, if the read-modify-write (RMW) type of instruction is
used to read the PDR2 register, the PDR2 register value is returned.
• Operation as a peripheral function output pin
• A pin becomes a peripheral function output pin if the peripheral output function is enabled by setting the output
enable bit of a peripheral function corresponding to that pin.
• The pin value can be read from the PDR2 register even if the peripheral function output is enabled. Therefore, the
output value of a peripheral function can be read by the read operation on the PDR2 register. However, if the read-
modify-write (RMW) type of instruction is used to read the PDR2 register, the PDR2 register value is returned.
• Operation as a peripheral function input pin
• To set a pin as an input port, set the bit in the DDR2 register corresponding to the input pin of a peripheral function
to “0”.
Register
abbreviation
Data Read
Read by read-modify-write
(RMW) instruction
Write
PDR2
0 Pin state is “L” level. PDR2 value is “0”. As output port, outputs “L” level.
1 Pin state is “H” level. PDR2 value is “1”. As output port, outputs “H” level.*
DDR2
0 Port input enabled
1 Port output enabled
PUL2
0 Pull-up disabled
1 Pull-up enabled
Correspondence between related register bits and pins
Pin name----P23P22P21P20
PDR2
----
bit3 bit2
bit1 bit0DDR2
PUL2 - -