MB95710M Series
MB95770M Series
Document Number: 002-09307 Rev. *D Page 103 of 172
• Reading the PDR2 register returns the pin value, regardless of whether the peripheral function uses that pin as its
input pin. However, if the read-modify-write (RMW) type of instruction is used to read the PDR2 register, the PDR2
register value is returned.
• Operation at reset
If the CPU is reset, all bits in the DDR2 register are initialized to “0” and port input is enabled.
• Operation in stop mode and watch mode
• If the pin state setting bit in the standby control register (STBC:SPL) is set to “1” and the device transits to stop
mode or watch mode, the pin is compulsorily made to enter the high impedance state regardless of the DDR2 reg-
ister value. The input of that pin is locked to “L” level and blocked in order to prevent leaks due to input open.
• If the pin state setting bit is “0”, the state of the port I/O or that of the peripheral function I/O remains unchanged
and the output level is maintained.
• Operation of the pull-up register
Setting the bit in the PUL2 register to “1” makes the pull-up resistor be internally connected to the pin. When the pin
output is “L” level, the pull-up resistor is disconnected regardless of the value of the PUL2 register.
• Operation as a comparator input pin
• Regardless of the value of the PDR2 register and that of the DDR2 register, if the comparator analog input enable
bit in the comparator control register ch. 0 (CMR0:VCID) is set to “0”, the comparator input function is enabled.
• To disable the comparator input function, set the VCID bit to “1”.
• For details of the comparator, refer to “CHAPTER 29 COMPARATOR” in “New 8FX MB95710M/770M Series Hard-
ware Manual”.
19.4 Port 6
Port 6 is a general-purpose I/O port. This section focuses on its functions as a general-purpose I/O port. For details of
peripheral functions, refer to their respective chapters in “New 8FX MB95710M/770M Series Hardware Manual”.
19.4.1 Port 6 configuration
Port 6 is made up of the following elements.
• General-purpose I/O pins/peripheral function I/O pins
• Port 6 data register (PDR6)
• Port 6 direction register (DDR6)
19.4.2 Block diagrams of port 6
• P60/SEG06 pin
This pin has the following peripheral function:
• LCDC SEG06 output pin (SEG06)
• P61/SEG07 pin
This pin has the following peripheral function:
• LCDC SEG07 output pin (SEG07)
• P62/SEG08 pin
This pin has the following peripheral function:
• LCDC SEG08 output pin (SEG08)
• P63/SEG09 pin
This pin has the following peripheral function:
• LCDC SEG09 output pin (SEG09)
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