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Cypress MB95710M Series - Features

Cypress MB95710M Series
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MB95710M Series
MB95770M Series
New 8FX 8-bit Microcontrollers
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 002-09307 Rev. *D Revised September 29, 2017
The MB95710M/770M Series is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the
microcontrollers of this series contain a variety of peripheral resources.
Features
F
2
MC-8FX CPU core
Instruction set optimized for controllers
Multiplication and division instructions
16-bit arithmetic operations
Bit test branch instructions
Bit manipulation instructions, etc.
Clock
Selectable main clock source
Main oscillation clock (up to 16.25 MHz, maximum ma-
chine clock frequency: 8.125 MHz)
External clock (up to 32.5 MHz, maximum machine clock
frequency: 16.25 MHz)
Main CR clock (4 MHz ±2%)
Main CR PLL clock
- The main CR PLL clock frequency becomes 8 MHz ±2%
when the PLL multiplication rate is 2.
- The main CR PLL clock frequency becomes 10 MHz
±2% when the PLL multiplication rate is 2.5.
- The main CR PLL clock frequency becomes 12 MHz
±2% when the PLL multiplication rate is 3.
- The main CR PLL clock frequency becomes 16 MHz
±2% when the PLL multiplication rate is 4.
•Main PLL clock (up to 16.25 MHz, maximum machine
clock frequency: 16.25 MHz)
Selectable subclock source
Suboscillation clock (32.768 kHz)
External clock (32.768 kHz)
Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz)
Timer
8/16-bit composite timer × 2 channels
8/16-bit PPG × 2 channels
16-bit reload timer × 1 channel
Event counter × 1 channel
Time-base timer × 1 channel
Watch counter × 1 channel
Watch prescaler × 1 channel
UART/SIO × 3 channels
Full duplex double buffer
Capable of clock asynchronous (UART) serial data transfer
and clock synchronous (SIO) serial data transfer
I
2
C bus interface × 1 channel
Built-in wake-up function
External interrupt × 8 channels
Interrupt by edge detection (rising edge, falling edge, and
both edges can be selected)
Can be used to wake up the device from different low power
consumption (standby) modes
8/12-bit A/D converter × 8 channels
8-bit or 12-bit resolution can be selected.
LCD controller (LCDC)
On MB95F714J/F714M/F716J/F716M/F718J/F718M, LCD
output can be selected from 40 SEG × 4 COM and 36 SEG
× 8 COM.
On MB95F774J/F774M/F776J/F776M/F778J/F778M, LCD
output can be selected from 32 SEG × 4 COM and 28 SEG
× 8 COM.
Internal divider resistor whose resistance value can be se-
lected from 10 kΩ or 100 kΩ through software
Interrupt in sync with the LCD module frame frequency
Blinking function
Inverted display function
Low power consumption (standby) modes
There are four standby modes as follows:
Stop mode
Sleep mode
•Watch mode
Time-base timer mode
I/O port
MB95F714J/F716J/F718J (number of I/O ports: 75)
General-purpose I/O ports (CMOS I/O): 71
General-purpose I/O ports (N-ch open drain): 4
MB95F714M/F716M/F718M (number of I/O ports: 74)
General-purpose I/O ports (CMOS I/O): 71
General-purpose I/O ports (N-ch open drain): 3
MB95F774J/F776J/F778J (number of I/O ports: 59)
General-purpose I/O ports (CMOS I/O): 55
General-purpose I/O ports (N-ch open drain): 4
MB95F774M/F776M/F778M (number of I/O ports: 58)
General-purpose I/O ports (CMOS I/O): 55
General-purpose I/O ports (N-ch open drain): 3
On-chip debug
1-wire serial control
Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
Built-in hardware watchdog timer
Built-in software watchdog timer
Power-on reset
A power-on reset is generated when the power is switched
on.

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