MB95710M Series
MB95770M Series
Document Number: 002-09307 Rev. *D Page 117 of 172
• PE5/SEG19/TO11 pin
This pin has the following peripheral functions:
• LCDC SEG19 output pin (SEG19)
• 8/16-bit composite timer ch. 1 output pin (TO11)
• PE6/SEG20/TO10 pin
This pin has the following peripheral functions:
• LCDC SEG20 output pin (SEG20)
• 8/16-bit composite timer ch. 1 output pin (TO10)
• PE7/SEG21/EC1 pin
This pin has the following peripheral functions:
• LCDC SEG21 output pin (SEG21)
• 8/16-bit composite timer ch. 1 clock input pin (EC1)
• Block diagram of PE5/SEG19/TO11, PE6/SEG20/TO10 and PE7/SEG21/EC1
19.9.3 Port E registers
• Port E register functions
• Correspondence between registers and pins for port E
Register
abbreviation
Data Read
Read by read-modify-write
(RMW) instruction
Write
PDRE
0 Pin state is “L” level. PDRE value is “0”. As output port, outputs “L” level.
1 Pin state is “H” level. PDRE value is “1”. As output port, outputs “H” level.
DDRE
0 Port input enabled
1 Port output enabled
Correspondence between related register bits and pins
Pin name PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
PDRE
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
DDRE
PDRE
Pin
PDRE read
PDRE write
Executing bit manipulation instruction
DDRE read
DDRE write
DDRE
0
1
1
0
Stop mode, watch mode (SPL = 1)
Peripheral function input
Peripheral function input enable
Peripheral function output enable
Peripheral function output
LCD output
Internal bus
LCD output enable
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