Denon AVR-890 - Audyssey Sound Enhancement Settings; MultEQ Speaker Correction Function; Dynamic EQ and Dynamic Volume Features

48
AVR-2310CI/2310/890, AVC-2310
R5F3650TNFB Block Diagram
R5F3650TNFB Terminal Function
Pin
No.
PIN PIN NAME I/O Type Det
Op
(in)
Op(ex) Res
PURE
D
CEC STBY
P. O F
F
Function
1 P94 VPLD DATA O C - - - Z O/L O/L Z FPGA control
2 P93 DIR CE O C - - - Z O/L O/L Z DIR(LC89058W-VF4A) control
3 P92/SOUT3 DIR DIN O C - - - Z O/L O/L Z DIR(LC89058W-VF4A) control
4 P91/SIN3 DIR DOUT I - Lv - Eu Z - - Z DIR(LC89058W-VF4A) control
5 P90/CLK3 DIR CLK O C - - - Z O/L O/L Z DIR(LC89058W-VF4A) control
6 BYTE BYTE - - - - - - - - - GND
7 CNVCS CNVSS - - - - Ed47k - - - - Firmware update control
8 P87 NC O C - - Eu Z O/H O/H Z
9 P86 OSD CPU BUSY
SO
O C - - - Z O/L O/L Z Interface between Sub CPU and D.OSD CPU
10 RESET SUBRESET
I - Lv - Eu L - - Z RESET pulse input
11 XOUT X1 O - - - - - - - - Oscillator connect
12 VSS VSS - - - - - - - - - GND
13 XIN X2 I - - - - - - - - Oscillator connect
14 VCC VCC - - - - - - - - +3.3V
15 P85/NMI/
(CEC)
NMI/(CEC_IN) I - - - - - - - - Connect to +3.3V
16 P84/INT2 CEC_IN I -
E
↓ &L
- Eu Z - - Z CEC control
17 P83/INT1 ACK SIMO I -
E
↓ &L
- Ed Z - - Z Interface between Main CPU and Sub CPU
18 P82/INT0 SUB BDOWN
I-
E
↓ &L
Eu Z - - Z Power off detect
19 P81 IP RST O C - - - Z O/H O/H Z IP CONV.(ABT2010) control
20 P80/(RXD5) TDO I - - - - Z Z - Z FPGA firmware update control (JTAG)
Clock synchronous serial I/O
(8 bits x 2 channels)
DMAC
(4 channels)
Internal peripheral functions
System clock generator
XIN-XOUT
XCIN-XCOUT
PLL frequency synthesizer
On-chip oscillator (125 kHz)
High-speed on-chip oscillator
Notes :
1. ROM size depends on MCU type.
2. RAM size depends on MCU type.
Port P0
8
Port P2
8 8 4 8
Port P5
Port P4Port P3
UART or
clock synchronous serial I/O
(3 channels)
UART
(1 channel)
VCC1 ports
M16C/60 series CPU core
R0LR0H
R1H R1L
R2
R3
A0
A1
FB
SB
ISP
USP
INTB
FLG
Memory
ROM
(1)
RAM
(2)
Multiplier
PC
CRC arithmetic circuit
(CCITT or CRC-16)
8 7 4
Port P7
Port P8Port P9Port P10
8
Port P6
8
Outputs (timer A): 5
Inputs (timer B) : 6
Timer (16-bit)
VCC1 ports
Real time clock
PWM function (8 bits X 2)
Remote control signal receiver
(2 circuits)
Watchdog timer
(15 bits
X 1)
A/D converter
(10 bits X 26 channels)
D/A converter
(8 bits X 2 channels)
Multi-master I
2
C bus interface
(1 channel)
CEC function
Voltage detection circuit
Power-on reset
On-chip debugger